14-07-2011, 03:03 PM
This paper deals with the architecture of the new revolutionary processor Crusoe. Crusoe, launched in 2000 by transmeta Inc . Is next generation microprocessor which uses a hardware and software to achieve dynamic reconfiguration and power saving. We examine the need for such a design, the gains and the details of the processor. Since the Intel x86 ISA (Instruction Set Architecture) is the predominant one in the market we do all this analysis with respect to a typical Pentium II/III. To design the Crusoe processor chips, the Transmeta engineers did not resort to exotic fabrication processes. Instead they rethought the fundamentals of microprocessor design. Rather than throwing hardware at design problems, they chose an innovative approach that employs a unique combination of hardware and software. Using software to decompose complex instructions into simple atoms and to schedule and optimize the atoms for parallel execution saves millions of logic transistors and cuts power consumption on the order of 60-70% over conventional approaches while at the same time enabling aggressive code optimizations techniques that are simply not feasible in traditional x86 implementations. Transmeta’s Code Morphing software and fast VLIW hardware, working together.
