Design and program multi-processor platform for high-performance embedded processing
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Abstract
Modern embedded markets call for high densitycomputing ability, making it is difficult to use just onemicroprocessor to meet function requirements of highperformanceembedded systems. Multiple processors, includinggeneral-purpose embedded microprocessors, digitalsignal processors (DSPs), ASICs and FPGA hardwareaccelerators, are often used in these embedded systems.Not all processors in an embedded device have the samecharacteristics and they are asymmetric. Heterogeneousmultiprocessors bring forward difficulties in both hardwareand software designs. The paper addresses the issues ofsupporting parallelization in asymmetric multiprocessor(AMP) environment from both hardware and softwaresides, including cache coherence, semaphore and embeddedsoftware programming.Index Terms—Asymmetric multi-processor, Symmetricmulti-processor, Cache coherence, Parallelism programming,Program model
I. INTRODUCTION
With the development of silicon technologies, embeddedchips become more powerful and have moredense computing ability. Embedded processors take theplace of general-purpose PC processors not only becauseof their low cost but also because of their lowpower consumption, rich functionality and high reliability.Embedded microprocessors have been used broadly inconsumer electronics (such as multimedia players andgaming devices) and communication devices (such ascellular phones and personal digital assistants). However,people’s pursue for high performance will never stop.Many embedded devices still call for high computing ability,making it is difficult to use just one microprocessorto satisfy the functionalities. For example, one advanced200 MIPS ARM processor is not powerful enough todecode MPEG4 or H.264 video signals in a set top box.In many embedded systems, more than one processor isused to achieve high performance, a number of tasks runin parallel [1]. Normally, the systems have three solutions:1) Designing software for several symmetric generalpurposeembedded microprocessors (SMP) [2] [3]running in parallel;2) One general-purpose embedded microprocessorplus programmable hardware accelerators (FPGAs),application-specific integrated circuits (ASICs), anddigital signal processors (DSPs). The generalpurposecooperates with the specific hardware toimprove performance;3) Asymmetric multiprocessors (AMP) [4] [5], blendingmulti-core microprocessor, DSPs, FPGAs andASICs.The first one is a pure software solution, in which, allprocessors have the same characteristics and identical.In this scenario, tasks are easy to schedule and everyprocessor can fully use their potential processing abilityif there are enough tasks. Thus, ‘best-effort’ and goodaverage performance can be easily achieved. However, inembedded systems, average performance and throughputare not the most important issue. Guaranteeing ‘hard’ realtimeis of the most important. For example, in a guidedmissile control system, the processing must be 100%deterministic. Hard real-time is usually guaranteed by anexclusive processor or by hardware. Therefore, embeddedsystems should include multiple processors to enhanceprocessing ability, and also need application-specificprocessor to guarantee real-time requirement. Blendinggeneral-purpose microprocessors and application-specificprocessors (asymmetric multiple processors) have beenthe way in embedded systems for years, and it willcontinue to be so.The scenario brings forward difficulties in both hardwareand software designs [6] [7]. In an asymmetricmultiple processors platform, all the processors shouldcommunicated in an efficient way. The issues in parallelprogramming should be supported, such as cache coherence,semaphore and task arrangement. New embeddedsoftware program model should be studied to improveprogram efficiency. Since the ARM microprocessors aremost-commonly used, the paper studies the solutions inARM multiple processors background, but the principleproposed in the paper is valid in any other multipleprocessor environments.The remainder of the paper is organized as follows:Section 2 describes the necessary of asymmetric multiprocessorarchitecture from the study of embedded processing,a common AMP architecture is presented; Section3 addresses the hardware support for data coherenceand process synchronization of AMPs. Section 4 discusseshow the processors in an AMP environment cooperateand communicate with each other; Section 5 proposes aprogram model for ASP embedded systems; and Section6 concludes the paper.


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