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Title: Fully Integrated CMOS GPS Radio Seminar Report
Page Link: Fully Integrated CMOS GPS Radio Seminar Report -
Posted By: Information Technology
Created at: Thursday 31st of December 2009 08:31:28 PM
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ABSTRACT
A single-chip CMOS Global Positioning System (GPS) radio has been integrated using only a couple of external passive components for the input matching network and one external reference for the synthesizer. The receiver downconverts the GPS L1 signal at 1575.42 MHz to an IF of 9.45 MHz. The complete front-end and frequency synthesizer section have been integrated: low noise amplifier, image rejection mixer, IF active filter, and the full phase-locked loop synthesizer, including voltage-controlled osci ....etc

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Title: CCD vs CMOS
Page Link: CCD vs CMOS -
Posted By: computer science crazy
Created at: Thursday 17th of September 2009 03:19:37 AM
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CCD vs. CMOS


Posing a great challenge to the traditional Charge Coupled Devices (CCD) in various applications, CMOS image sensors have improvised themselves with time, finding solutions for the problems related with the noise and sensitivity. The use of Active Pixel Sensors having its foundation with the sub-micron technologies have helped to attain low power, low voltage and monolithic integration allowing. The manufacture of miniaturised single-chip digital cameras is an example of this technology.
The incorporation of advanced techn ....etc

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Title: CMOS TIME INTERLEAVED ADC
Page Link: CMOS TIME INTERLEAVED ADC -
Posted By: shibin.sree
Created at: Monday 28th of December 2009 09:31:23 PM
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ABSTRACT

A pipelined analog-to-digital converter (ADC) architecture suitable for high-speed (150 MHz), Nyquist-rate A/D conversion is presented. At the input of the converter, two parallel track-and-hold circuits are used to separately drive the sub-ADC of a 2.8-b first pipeline stage and the input to two time-interleaved residue generation paths. Beyond the first pipeline stage, each residue path includes a cascade of two 1.5-b pipeline stages followed by a 4-b backend folding ADC. The full-scale residue range at the output of the pipeline ....etc

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Title: BUILT IN SELF TEST FOR A CMOS ALU
Page Link: BUILT IN SELF TEST FOR A CMOS ALU -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:26:27 AM
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BUILT IN SELF TEST FOR A CMOS ALU

Abstract:- A technique is proposed for implementing BIST (built-in self-test) in a CMOS arithmetic and logic unit (ALU). The approach covers single stuck-open faults and all functional faults that do not induce memory effects. The specific fault set covered by the test includes: (1) all single stuck-open faults on n and p transistors anywhere in the ALU (F1 faults); and (2) all functional faults that affect any single-bit slice of the (F2 faults), a functional fault being any fault that changes one combinati ....etc

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Title: CCD vs CMOS Image
Page Link: CCD vs CMOS Image -
Posted By: Computer Science Clay
Created at: Thursday 30th of July 2009 06:33:30 PM
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Posing a great challenge to the traditional Charge Coupled Devices (CCD) in various applications, CMOS image sensors have improvised themselves with time, finding solutions for the problems related with the noise and sensitivity. The use of Active Pixel Sensors having its foundation with the sub-micron technologies have helped to attain low power, low voltage and monolithic integration allowing. The manufacture of miniaturised single-chip digital cameras is an example of this technology.

The incorporation of advanced techniques at the chip ....etc

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Title: A 130nm CMOS to Minimize area and quantization noise in frequency synthesizer
Page Link: A 130nm CMOS to Minimize area and quantization noise in frequency synthesizer -
Posted By: seminar class
Created at: Monday 02nd of May 2011 04:52:51 PM
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PRESENTED BY
S.ELANGO
P.C. KISHORE KUMAR


A 130nm CMOS to Minimize area and quantization noise in frequency synthesizer using offset PLL
ABSTRACT
 It achieves low-noise .
 OPLL highly suppresses the quantization noise from the delta-sigma modulator.
 It consumes low power by employing charge-recycling
technique in the sub-PLL.
 Synthesizer implemented in 0.13 ȗm
 CMOS process achieves 9 dB of noise reduction compared to a conventional PLL while consuming 3.2 mW of po ....etc

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Title: Fully Integrated CMOS GPS Radio Download Full Report And Abstract
Page Link: Fully Integrated CMOS GPS Radio Download Full Report And Abstract -
Posted By: computer science crazy
Created at: Sunday 22nd of February 2009 03:36:33 AM
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1. INTRODUCTION

GLOBAL Positioning System (GPS) receivers for the consumer market require solutions that are compact, cheap, and low power. Manufacturers of cellular telephones, portable computers, watches, and other mobile devices are looking for ways to embed GPS into their products. Thus, there is a strong motivation to provide highly integrated solutions at the lowest possible power consumption. GPS radios consist of a front-end and a digital baseband section incorporating a digital processor. While for the baseband processor, cost-reduc ....etc

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Title: CMOS Noise Modeling and Measurements at 60 GHz
Page Link: CMOS Noise Modeling and Measurements at 60 GHz -
Posted By: project report helper
Created at: Tuesday 19th of October 2010 01:59:23 PM
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CMOS Noise Modeling and Measurements at 60 GHz

Outline

Review of millimeter-wave noise models
Physics-based compact models
Measurement-based empirical models
Small-signal equivalent-circuit models

Millimeter-wave noise measurements
Noise parameter (variable ZS)
Lossy pad de-embedding

Simulated and measured results
Individual CMOS transistors
60-GHz amplifier circuit
....etc

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Title: matlab code for salt and pepper noise removal by median type noise detectors and detail preserving regularization
Page Link: matlab code for salt and pepper noise removal by median type noise detectors and detail preserving regularization -
Posted By:
Created at: Monday 22nd of July 2013 12:01:29 AM
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Dear Madam\sir,

I am a research student. i want the matlab codings for salt and pepper noise removal by median type noise detectors and detail preserving regularization for my project dissertation. ....etc

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Title: Salt-and-Pepper Noise Removal by Median-type Noise Detectors and Detail-preserving
Page Link: Salt-and-Pepper Noise Removal by Median-type Noise Detectors and Detail-preserving -
Posted By: seminar class
Created at: Saturday 07th of May 2011 01:35:21 PM
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Abstract
This paper proposes a two-phase scheme for removing salt-and-pepper impulse noise. In the first
phase, an adaptive median filter is used to identify pixels which are likely to be contaminated by noise
(noise candidates). In the second phase, the image is restored using a specialized regularization method
that applies only to those selected noise candidates. In terms of edge preservation and noise suppression,
our restored images show a significant improvement compared to those restored by using just nonlinear
filters or r ....etc

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