Plz .. i want VHDL code for The Vocoder .. any 1 can help me in this request ?.... and thx for Attention ..

IMPLEMENTATION OF G.726 ITU-T VOCODER ON A SINGLE CHIP
USING VHDL
The objective of the paper is to
design a high density DECODER for
handling multi-channels(256) of G.726.
ADPCM Decoder in FPGA to convert 64
kbps digital streams in to 40 kpbs, 32
kbps, 24 kbps or 16 kbps using VHDL. high speed advantage
because of parallel processing of DSP
algorithm. is an advantage of this. The complete multichannel
decoder is implemented in
ALTERA(EPF10K70RC240-4) FPGA.256 channels can be handled by the parallel logic. In
case of serial architecture 50% area
saving is achieved, but the number of channels is reduced.


G.726 ADPCM VOCODER
The Voice coder is one, which
Compress & De-compress the voice
samples for transmission & reception of
voice with limited bandwidth. Waveform coding is used here. there is no latency,
very good voice reproduction and less
complexity in implementation for waveform coding as compared to other forms of coding like the source coding.

ADPCM encoder
a difference
signal is obtained, by subtracting an
estimate of the input signal from the
input signal for linear PCM.

for more details, refer this pdf:
[attachment=3668]