28-01-2010, 12:13 AM
a) FPGA implementation
b) Implementation and prototyping on 8051 core architecture on FPGA
c) Implementation of 12C controller on FPGA
d) A VLSI Architecture For Visible Watermarking In A Secure Still Digital Camera (S2dc) Design (Corrected)
e) An FPGA-Based Architecture for Real Time Image Feature Extraction
f) A Low-Power Multiplier with the Spurious Power Suppression Technique
g) A Symbol-Rate Timing Synchronization Method for Low Power Wireless OFDM Systems
h) Block-Based Multiperiod Dynamic Memory Design For Low Data Retention Power
i) Controllable Arbitrary Integer frequency divider based on VHDL
j) Compliant Digital Base band Transmitter on a Digital Signal Processor
k) Design and implementation of spectral estimation algorithm on FPGA
l) Design and analysis of low density parity check encoder for fixed and mobile wireless access systems
m) Design analysis of 1-Gigabit Ethernet media access controller(gemac) core for full-duplex operation
n) Design and turbo convolution code decoder for 3GPP wireless mobile communication systems
o) Design and implementation of orthogonal frequency division multiple access modem on FPGA
p) Development of keyboard controller for single board computer based on FPGA
q) Design and discrete cosine transform processor on FPGA for video compression applications
r) Design and development of traffic light controller on FPGA
s) Design and implementation of CAN Controller on FPGA
t) Design Exploration of A Spurious Power Suppression Technique (SPST) And itâ„¢s Applications
u) Design Of Reconfigurable Coprocessor for Communication Systems
v) Digital system control for Three Degree of Freedom Mechanical Arm with FPGA
w) Design and implementation of Digital Camera System on Chip
x) Development of 8051 microcontroller synthesizable model and implementation on FPGA
y) Development of intellectual property for local interconnect network for automobile sensor interface applications
z) Design and implementation of finite impulse response filter in FPGA using VHDL
aa) Implementation of A Multi-Channel UART Controller Based On FIFO Technique and FPGA
bb) Implementation of IEEE 802.11 a WLAN base band Processor
cc) On The Design Of A Multi-Mode Receive Digital-Front-End For Cellular Terminal Rfics
dd) Optimized Software Implementation of a Full-Rate IEEE 802.11a
ee) The CSI Multimedia Architecture
ff) VLSI Architecture and FPGA Prototyping of a Digital Camera for Image Security and Authentication
gg) VHDL implementation of direct sequence spread spectrum modulator for personal secure communication in battle filed
hh) A lossless data compression and decompression algorithm and its hardware architecture
ii) A Verilog impimentation of UART Design with Bist Capability
jj) A Robust UART Architecture based on Recursive Running Sum Filter for Better Noise Performance
kk) An area-efficient Universal Cryptography Processor for smart cards
ll) An FPGA based general purpose data acquisition controller
mm) A PicoBiaze-Based Embedded system for monitoring applications
nn) A VHDL Model of IEEE1451.2 Smart Sensor: Characterization and application
oo) Design and prototyping of portable media player asic on FPGA
pp) Development of Huffman encoder for MPEG-2 video encoding applications
qq) Design of real time clock on FPGA for portable hand held applications
rr) Development of FPGA based PCI bus arbiter multiprocessor Environment
ss) Design and implementation of adaptive differential pulse code modulation encoder and decoder ip for communication applications
tt) Development of video display processor on FPGA
uu) FPGA Implementation of USB Transceiver Macro cell Interface With Usb2.0 Specifications
vv) FPGA Based Generation of High Frequency Carrier for Pulse Compression Using Cordic Algorithm
ww) FPGA based Power Efficient Channelizer for Software defined Radio
xx) FPGA based implementation communication modulation
yy) Fuzzy based PID Controller using VHDL/VERILOG for Transportation Application
zz) Improvement of the orthogonal Code Convolution Capabilities using
