16-01-2010, 12:51 AM
a. Design of Dual Elevator Controller
b. Design of an ATM (Automated Teller Machine) Controller
c. Design of an ATP (Any Time Payment) Machine for Electricity Bill Payment Application
d. Design of 8-Bit Pico Processor
e. Design of JPEG Image compression standard
f. Design of RS-232 System Controller
g. Design of 16 Point Radix-4 FFT (Fast Fourier Transform) Algorithm
h. Design of Triple Data Encryption Standard (DES)
i. Design of Floating Point Unit (FPU)
j. Design of Universal Asynchronous Receiver Transmitter (UART) “ 16550
k. Design of OFDM (Orthogonal Frequency Division Multiplexing) Transmitter
l. Design of a Reconfigurable Coprocessor for Redundant Radix-4 Arithmetic
m. Design of SRAM (Static Random Access Memory)
n. Design of Pseudo Random Binary Sequence (PRBS) and Linear Feedback Shift Register (LFSR)
o. Design of Ethernet MAC (Medium Access Control)
p. Design of 16-bit QPSK (Quadrature Phase Shift Keying)
q. Design of Arithmetic Logic Unit (ALU)
r. Design of Stepper Motor Controller
s. Design of DMA (Direct Memory Access) Controller
t. Design of LCD Display
u. Design of 32-Bit RISC (Reduced Instruction Set Computer) Processor
v. Design of PCI-X Bus
w. Design of CRC (Cyclic Redundancy Check) Generator
x. Design of FIR Filter
y. Design of Bluetooth Encryption Algorithm
z. Design of Physical Layer (Base Station Coder CDMA)
aa. Design of Data Encryption Standard (DES)
bb. Design of Floating-Point Multiplier using IEEE-754 Standard
cc. Design of HDLC (High Level Data Link Controller)
dd. Design of 8-Bit Microcontroller
ee. Design of I2C Protocol IP Block
ff. Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block
gg. Design of an Bus Bridge between OCP and AHB Protocol
hh. Design and Realization of a CAN Bus Protocol
ii. Design of Gigabit Ethernet MAC (Medium Access Control) Transmitter and Receiver
jj. Design and Implementation of 16-QAM (Quadrature Amplitude Modulation) Modulator and Demodulator
kk. Design of 64-bit RISC (Reduced Instruction Set Computer) Processor
ll. Design of AES (Advanced Encryption Standard) Encryption and Decryption Algorithm with 128-bits Key Length
mm. Design and Implementation of USB 2.0 Transceiver Macro-cell Interface (UTMI)
nn. Design and Implementation of Lossless DWT/IDWT (Discrete Wavelet Transform & Inverse Discrete Wavelet Transform) for Medical Images
oo. Design of an Open Core Protocol (OCP) IP Block
pp. Design and Implementation of Reversible Watermarking for JPEG2000 Standard
qq. Design and Implementation of Adaptive Viterbi Decoder
rr. Design and Implementation of 10/100 Mbps (Mega bits per second) Ethernet Switch for Network applications
ss. Design & Implementation of High Speed DDR DSRAM Controller
tt. Design and Implementation of Efficient Systolic Array Architecture for DWT (Discrete Wavelet Transform)
uu. Design and Implementation of Digital low power base band processor for RFID Tags
vv. Design and Implementation of Incremental Encoder based Position and Velocity Measurement Chip
