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seven level inverter ppt
This paper proposes a new solar power generation system, which is composed of a dc/dc power converter and a new seven-level inverter. The dc/dc power converter integrates a dc-dc boost converter and a transformer to convert the output voltage of the solar cell array into two independent voltage sources with multiple relationships. This new seven-level inverter is configured using a capacitor selection circuit and a full-bridge power converter, connected in cascade. The capacitor selection circuit converts the two output voltage sources of dc-dc power converter into a three-level dc voltage, and the full-bridge power converter further converts this three-level dc voltage into a seven-level ac voltage. In this way, the proposed solar power generation system generates a sinusoidal output current that is in phase with the utility voltage and is fed into the utility. The salient features of the proposed seven-level inverter are that only six power electronic switches are used, and only one power electronic switch is switched at high frequency at any time. A prototype is developed and tested to verify the performance of this proposed solar power generation system.
This paper presents a new hybrid cascaded H-bridge multilevel inverter motor drive DTC scheme for electric vehicles where each phase of the inverter can be implemented using a single DC source. Traditionally, each phase of the inverter requires DC source for output voltage levels. In this paper, a scheme is proposed that allows the use of a single DC source as the first DC source which would be available from batteries or fuel cells, with the remaining () DC sources being capacitors. This scheme can simultaneously maintain the capacitors of DC voltage level and produce a nearly sinusoidal output voltage due to its high number of output levels. In this context, high performances and efficient torque and flux control are obtained, enabling a DTC solution for hybrid multilevel inverter powered induction motor drives intended for electric vehicle propulsion. Simulations and experiments show that the proposed multilevel inverter and control scheme are effective and very attractive for embedded systems such as automotive applications.
1. Introduction
Currently, automotive applications such as EV’s seem to constitute an increasingly effective alternative to conventional vehicles, allowing vehicle manufacturers to fulfill users requirements (dynamic performances and fuel consumption) and environmental constraints (pollutant emissions reduction) [1].
The electric propulsion system is the heart of EV. It consists of the motor drive, transmission device, and wheels. In fact, the motor drive, comprising the electric motor, the power converter, and the electronic controller, is the core of the EV propulsion system. The motor drive is configured to respond to a torque demand set by the driver [2].
The induction motor seems to be a very interesting solution for EV’s propulsion. FOC and DTC have emerged as the standard industrial solutions to achieve high dynamic performance [3–5]. However some drawbacks of both methods have motivated important research efforts in the last decades. Particularly for DTC, the high torque ripple and the variable switching frequency introduced by the hysteresis comparators have been extensively addressed [6, 7]. In addition, several contributions that combine DTC principles together with PWM and SVM have been reported to correct these problems. This approach is based on the load angle control, from which a voltage reference vector is computed which is finally modulated by the inverter [8]. Although one major feature of classic DTC is the absence of modulators and linear controllers, this approach has shown significant improvements and achieves similar dynamic performance.
On the other hand, power converter technology is continuously developing, and cascaded multilevel inverters have become a very attractive solution for EV applications, due to its modular structure, higher voltage capability, reduced common mode voltages, near sinusoidal outputs, and smaller or even no output filter [9–12]. In general, cascaded multilevel inverter may be classified in two groups. The first one refers to the amplitude of isolated DC sources devoted to supply each H-bridge cell. If the amplitude of all sources is equal, then the inverter is called symmetrical; otherwise, if at least one of the sources presents different amplitude, then it will be called asymmetrical. The second classification labels the multilevel inverter whether hybrid or not. If the converter is implemented with different semiconductor device technologies, different nature of DC sources (fuel cells, batteries, and supercapacitors) and/or if it presents a hybrid modulation strategy, then it is classified as hybrid [13–15]. This structure greatly simplifies the converter complexity.
The proposed control algorithm eliminates the need of additional isolated DC sources. The control strategy regulates the DC page link voltages of capacitors connected to the smallest voltages of a two-cell 7-level cascaded H-bridge inverter [16]. Specifically and in comparison to previous works [17, 18], the proposed control does not use an angle for capacitor voltage regulation but a comparison voltage level. This will facilitate a DSP implementation.
The carried out simulations and experiments validate the voltage control strategy and confirm the high dynamic performance of the proposed method, presenting very low torque ripple.
2. Multilevel Inverter Topology
The power circuit of the cascaded H-bridge multilevel inverter is illustrated in Figure 1. The inverter is composed by the series connection of power cells, each one containing an H-bridge inverter and an isolated DC source. In the particular case of asymmetric inverters these sources are not equal (). The asymmetry of the input voltages can reduce or, when properly designed, eliminate redundant output levels, maximizing the number of different levels generated by the inverter. Therefore, this topology can achieve the same output voltage quality with less number of semiconductors, space, costs, and internal fault probability than the symmetric fed topology.