18-07-2011, 09:51 AM
[attachment=14526]
Abstract
Phase Change Memory (PCM) technology appears as more scalable than DRAM technology. As PCM exhibits access time slightly longer but in the same range as DRAMs, several recent studies have proposed to use PCMs for designing main memory systems. Unfortunately PCM technology su ers from a limited write endurance; typically each memory cell can be only be written a large but still limited number of times (107 to 109 writes are reported for current technology). Till now, research proposals have essentially focused their attention on designing memory systems that will survive to the average behavior of conventional applications. However PCM memory systems should be designed to survive worst-case applications, i.e., malicious attacks targeting the physical destruction of the memory through overwriting a limited number of memory cells.This seminar paper proposes the design of a secure PCM-based main memory that would by construction survive to overwrite attacks.
1 Introduction
Phase Change Memory (PCM) technology appears as a promising technology for designing main memory in future computer systems. PCM presents advantages over DRAMs in terms of static energy consumption as well as integration scalability for future technologies generations; for instance, anticipates durance, i.e., a PCM memory cell can only support a limited number of writes and exceeding this limit might impair its correct functioning. The reported write endurances for PCM memory vary between 107 and 109 writes on a single cell. Such a limited
endurance has been recognized as issue for the design of PCM-based main memory systems. Several propositions have been made to allow a PCM main memory to survive the anticipated lifetime of a computer system ,i.e., 10 to 20 years, in the context of general applications. At the exception of these studies completely ignore the security breach that the limited write endurance of PCM components would create in a main memory. PCM components for main memory would create a main memory through a very simple program overwriting the same memory cells again and again. The potential attack is particularly simple to mount. It can be run by any user without any execution privilege. It is seen that their Region Based Start Gap scheme would survive a few months to a naive overwrite attack consisting in constantly overwriting the same physical memory address. However, the Region Based Start Gap (RBSG)
scheme considered in would not survive more than a few days to a slightly more complex attack based on the birthday paradox. More over the RBSG scheme a RBSG scheme supporting page mode would even be less endurant to an overwrite attack.This paper proposes the design of a secure main PCM memory. In order to prevent a malicious user to overwrite some memory cells, the physical memory address (PA) manipulated by the computer system is not the same as the PCM memory address (PCMA) . PCMA is made invisible from the rest of the computer system. The PCM memory controller is in charge of the PA-to-PCMA translation. Hiding PCMA alone does not prevent a malicious user to blindly overwrite some PCM memory blocks.
Therefore in the secure PCM-based main memory, PA-to-PCMA translation is continuouslymodi ed through a random process. This prevents a malicious user to overwrite some PCM memory words, it also uniformizes the write pressure on the overall memory for every possible type of workloads. For implementing the PA-to-PCMA translation, the PCM memory controller implements a translation table and needs
