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Title: Applying CDMA Technique to Network-on-Chip
Page Link: Applying CDMA Technique to Network-on-Chip -
Posted By: Wifi
Created at: Tuesday 19th of October 2010 08:31:50 PM
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Applying CDMA Technique to Network-on-Chip
The details of applying a code-division multiple access (CDMA) technique to an on-chip packet switched communication network is described in this article. Here, VHDL is used to implement a packet switched network-on-chip (NoC) that applies the CDMA technique at the RTL level. The globally-asynchronous locally-synchronous (GALS) communication scheme is supported by the chip so developed. a point-to-point connection schemes data transfer latency is reduced by this NoC by sharing the data commu ....etc

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Title: Network on Chip
Page Link: Network on Chip -
Posted By: hemlata dalmia
Created at: Tuesday 07th of September 2010 02:49:13 PM
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pl send the documentation for the topic mentioned thanks a lot for ur attention
pl send the documentation for the below mentioned topics:
Antenna Effect in VLSI Designs
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Title: carbon chip or diamond chip
Page Link: carbon chip or diamond chip -
Posted By: sprity
Created at: Sunday 28th of February 2010 01:08:58 PM
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i want full report on carbon chip or diamond chip and ppt ....etc

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Title: network on chip using vlsi
Page Link: network on chip using vlsi -
Posted By:
Created at: Saturday 06th of October 2012 12:20:32 AM
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please send materials regarding low power and area efficient carry select adder ....etc

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Title: diamond chip o carbon chip
Page Link: diamond chip o carbon chip -
Posted By: vijay kumarkm
Created at: Wednesday 03rd of March 2010 02:20:19 PM
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Electronics without silicon is unbelievable, but it will come true with the evolution of Diamond or Carbon chip. Now a day we are using silicon for the manufacturing of Electronic Chip's. It has many disadvantages when it is used in power electronic applications, such as bulk in size, slow operating speed etc. Carbon, Silicon and Germanium are belonging to the same group in the periodic table. They have four valance electrons in their outer shell. Pure Silicon and Germanium are semiconductors in normal temperature. So in the earlier days they a ....etc

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Title: Applying CDMA tecnology on Network on chip
Page Link: Applying CDMA tecnology on Network on chip -
Posted By: admin
Created at: Wednesday 16th of November 2011 01:57:24 PM
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hi , today i got an email from Nimmy Rose James , i just quote details below, can any one help for this regard ?

I'm Nimmy Rose James, from India.I'm an M tec
student Kerala .I'm tryng to implement a IEEE paper Applyind CDMA
tecnology on Network on chip for my seminar . so I Kindly request you
to help me with is project with vhdl codings. ....etc

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Title: NETWORK ON CHIP NoC
Page Link: NETWORK ON CHIP NoC -
Posted By: seminar class
Created at: Thursday 24th of February 2011 01:12:18 PM
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NETWORK ON CHIP (NoC)
To study and implement Network on Chip architecture on FPGA using mesh topology
Growing Chip Density
► Hundreds of Processing Elements (PEs) on a single chip
► Design Complexity
► Efficient high performance interconnect
► Scalability of communication architecture
PRESENT TECHNOLOGY
► System On Chip(SoC)
► Many computing resources on single chip
► Low power consumption
► Shared Bus interconnection for communication
DRAWBACKS OF SoC
► Vary challeng ....etc

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Title: A Two-Dimensional Low-Diameter Scalable On-Chip Network for Interconnecting Thousands
Page Link: A Two-Dimensional Low-Diameter Scalable On-Chip Network for Interconnecting Thousands -
Posted By: Projects9
Created at: Monday 23rd of January 2012 07:41:27 PM
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Abstract—This paper introduces the Spidergon-Donut (SD) on-chip interconnection network for interconnecting 1,000 cores in future MPSoCs and CMPs. Unlike the Spidergon network, the SD network which extends the Spidergon network into the second dimension, significantly reduces the network diameter, well below the popular 2D Mesh and Torus networks for one extra node degree and roughly 25 percent more links. A detailed construction of the SD network and a method to reshuffle the SD network's nodes for layout onto the 2D plane, and simple one-to ....etc

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Title: Network on chip
Page Link: Network on chip -
Posted By: dinesh89g
Created at: Friday 10th of February 2012 01:29:42 PM
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I am dinesh .I am studying in RMK Engineering college.I want to know very basic idea about Network On Chip'.what are its advantages and real time applications?.so please help me ....etc

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Title: Flip chip or Direct Chip Attach DCA
Page Link: Flip chip or Direct Chip Attach DCA -
Posted By: Electrical Fan
Created at: Saturday 14th of November 2009 07:31:59 PM
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In the development of packaging of electronics the aim is to lower cost, increase the packaging density, and improve the performance while still maintaining or even improving the reliability of the circuits. Flip chip microelectronic assembly is the direct electrical connection of face-down electronic components onto substrates, circuit boards, or carriers, by means of conductive bumps on the chip bond pads since the chip is directly attached to the substrate, board, or carrier by the conductive bumps. Flip chip has advantage in size, performan ....etc

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