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Title: multi channel infra red control 4 different point 89c2051 micro controller in transmitter and receiver using infra red t
Page Link: multi channel infra red control 4 different point 89c2051 micro controller in transmitter and receiver using infra red t -
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Created at: Saturday 19th of January 2013 11:45:26 PM
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Are you looking for multi channel infra red control 4 different point 89c2051 micro controller in transmitter and receiver using infra red techni ? ....etc

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Title: fpga based design of a novel enhanced error detection and correction technique code
Page Link: fpga based design of a novel enhanced error detection and correction technique code -
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Created at: Sunday 18th of November 2012 06:41:18 PM
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We have done 3 bit error correction for 8 bit orthogonal codes. but how can we detect 7 bit errors in the case of 16 bit orthogonal codes as in general we can detect (n/2-1) bits? ....etc

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Title: multichannel uart controller based on fifo technique and fpga ppt
Page Link: multichannel uart controller based on fifo technique and fpga ppt -
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Created at: Thursday 03rd of January 2013 11:51:03 AM
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Title: plc based multi channel fire alarm system pdf
Page Link: plc based multi channel fire alarm system pdf -
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Created at: Tuesday 25th of September 2012 05:49:24 PM
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Title: DUAL PORT FIFO
Page Link: DUAL PORT FIFO -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:26:23 AM
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DUAL PORT FIFO

Abstract:- The dual port FIFO is now a standard building block in most designs, especially in the area of communications where it is used frequently for packet work. Although very useful in its basic form, the standard FIFO does lack two attributes; autonomy and cascadability. Unfortunately you cannot simply connect two FIFOâ„¢s together, as shown below, and expect them to automatically transfer data ....etc

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Title: DESIGN AND IMPLEMENTATION OF ASYNCHRONOUS FIFO FOR EMBEDDED APPLICATIONS
Page Link: DESIGN AND IMPLEMENTATION OF ASYNCHRONOUS FIFO FOR EMBEDDED APPLICATIONS -
Posted By: computer science crazy
Created at: Thursday 17th of September 2009 04:31:49 AM
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DESIGN AND IMPLEMENTATION OF ASYNCHRONOUS FIFO FOR EMBEDDED APPLICATIONS

A FIFO is used as a First In-First Out memory buffer between two asynchronous systems with simultaneous write and read access to and from the FIFO, these accesses being independent of one another. Data written into a FIFO is sequentially read out in a pipelined manner, such that the first data written into a FIFO will be the first data read out of the FIFO.

FIFO status flag outputs are a function of the comparison of the respective write and read pointers. A FIFO w ....etc

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Title: A HIGH SPEED DISTRIBUTED FIFO SCHEME FOR MANAGING INTERCONNECTS
Page Link: A HIGH SPEED DISTRIBUTED FIFO SCHEME FOR MANAGING INTERCONNECTS -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:25:12 AM
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A HIGH SPEED DISTRIBUTED FIFO SCHEME FOR MANAGING INTERCONNECTS

Abstract:- Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as well as the transistors. Scaling trends allow for complete systems to be built on a single chip (SoC), but they require long interconnects for global signals and clock distribution networks. The parasitic of these global interconnects make efficient and high-performance operation difficult. On-chip communicati ....etc

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Title: Implementation of a Multi-channel UART Controller Based on FIFO Technique and FPGA
Page Link: Implementation of a Multi-channel UART Controller Based on FIFO Technique and FPGA -
Posted By: projectsofme
Created at: Wednesday 13th of October 2010 08:01:24 PM
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This article is presented by:
Shouqian Yu
Lili Yi
Weihai Chen
Zhaojin Wen
Implementation of a Multi-channel UART
Controller Based on FIFO Technique and FPGA


Abstract:
To meet modern complex control systems communication demands, the paper presents a multi-channel UART controller based on FIFO(First In First Out) technique and FPGA(Field Programmable Gate Array). The paper presents design method of asynchronous FIFO and structure o ....etc

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Title: Opportunistic Routing in Multi-radio Multi-channel Multi-hop Wireless Networks
Page Link: Opportunistic Routing in Multi-radio Multi-channel Multi-hop Wireless Networks -
Posted By: seminar class
Created at: Thursday 05th of May 2011 03:07:40 PM
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Abstract
Two major factors that limit the throughput inmulti-hop wireless networks are the unreliability of wirelesstransmissions and co-channel interference. One promising techniquethat combats lossy wireless transmissions is opportunisticrouting (OR). OR involves multiple forwarding candidates torelay packets by taking advantage of the broadcast nature andspacial diversity of the wireless medium. Furthermore, recentadvances in multi-radio multi-channel transmission technologyallows more concurrent transmissions in the network, and sh ....etc

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Title: Architecture for Multi-Interface Multi-Channel Wireless Networks
Page Link: Architecture for Multi-Interface Multi-Channel Wireless Networks -
Posted By: smart paper boy
Created at: Friday 12th of August 2011 01:25:41 PM
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Abstract
With the increase of usage of wireless networks for purposes where the nodes are either stationary or minimally mobile, focus is also on increasing the network capacity of wireless networks. One such way is to use non-overlapping multiple channels provided by 802.11 by using multiple interfaces per node. Multiple nonoverlapped channels exist in the 2.4GHz and 5GHz spectrum. However, most IEEE 802.11-based multihop ad hoc networks today use only a single channel. As a result, these networks rarely can fully exploit the aggrega ....etc

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