Multiband Hysteresis Modulation and Switching Characterization for Sliding-Mode-Controlled Cascaded Multilevel Inverter



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INTRODUCTION

THE BASIC motivations for the use of multilevel inverters
are the reduction of voltage stress on power electronic
devices and the reduction in the switching harmonic content
of the voltage delivered by the voltage-source inverter (VSI).
The cascaded H-bridge multilevel-inverter (CHBMLI) configuration
has the advantage of its simplicity and modularity over
a diode-clamped multilevel inverter or a flying-capacitor multilevel
inverter [1]–[3]. Various improved modulation schemes
have been proposed for CHBMLI in the recent past [4]–[7].
The complexities involved in the modulation of multilevel
inverter under closed loop depend upon the number of levels
used and the topology of the cascaded multilevel inverter
[8]–[10].


Hierarchical Switching Scheme

There are many switching combinations for obtaining the
same level of inverter output voltage [25]. In this section, a
switching scheme is proposed to follow the algorithm given
in (9) for obtaining the five-level output, which can easily be
extended to the further higher level inverter.


Switching Characterization

In this section, an expression relating the desired maximum
switching frequency fc of the switching elements in the
H-bridges of the cascaded multilevel inverter, and the hysteresis
band h of the multiband hysteresis modulation, as shown in
Fig. 3, has been obtained.


DC-Link-Voltage Control

The reference amplitude Vtref for the PCC voltage can be
chosen independently as desired in (3) for all the three-phases,
as discussed previously, whereas the phase angle δp for the
PCC voltage of phase a is obtained using the following dc-linkvoltage


Swapping of Hierarchy
With the fixed hierarchy shown in Fig. 4(a), the switching
stress on two H-bridges of the same phase will be different.
This will lead to the divergence of dc-link voltages Vdck1
and Vdck2 from their reference set values. In order to have
an equal switching stress, the hierarchy of each H-bridge is
swapped sequentially [29] with the period of the fundamental
frequency. This is accomplished by running a counter that
resets at the zero crossings of the signal at the fundamental
frequency. At every reset, the hierarchy is changed sequentially.
This provides equal average switching for both cascaded
H-bridges of the same phase. The charging and discharging
cycles will also be equal for the two capacitors, and this will
provide the self-balancing capability of the dc-link voltage
across the capacitors.


CONCLUSION
The proposed frequency-domain method of switching characterization
for CHBMLI has estimated accurately the hysteresis
bandwidth for the desired maximum switching frequency.
The multiband hysteresis modulation proposed in this paper has
shifted the switching components toward higher frequencies
and has hence reduced the switching ripple content in the
output controlled voltage. The use of hierarchical switching
algorithm for different cells of the cascaded multilevel inverter
has made the implementation easier. The sequential swapping
of hierarchy for each cell yields the self-balancing capability
in case the dc-link voltage is supported by the capacitors.
The simulation and experimental verification of the derived
results have been provided through a single-phase DSTATCOM
model.