Magnetic Random Access Memories (M-RAM)
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Magnetic Random Access Memories (M-RAM) : A truly universal memory

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Introduction
Recent developments in the physics of spin electronics (see Inset) have enabled the
emergence of a new class of non-volatile memories, Magnetic Random Access Memories
(MRAM). MRAM combine on paper all the virtues of current silicon-based memories: speed,
density, non-volatility, low power consumption, radiation hardness and endurance (see Table
1). The first target for MRAM is replacement of Flash memories, such as those used in cell
phones, digital cameras, smart cards etc…, which, despite being non-volatile, have a high
power consumption, are sluggish at write and are prone to aging effects. In a longer run,
MRAM may well become a universal memory which would also be substituted for Static
RAM (SRAM) and Dynamic RAM (DRAM).


The basic MRAM cell: The Magnetic Tunnel Junction
In MRAM, the information is no longer stored by electrical charges, as in semiconductor
memories, but by two opposite directions of the magnetization vector in a small
magnetic nanostructure. The basic MRAM cell [1] is the so-called Magnetic Tunnel Junction
(MTJ) which consists of two magnetic layers sandwiching a thin (sub-nm) insulating layer
(see Fig. 1). The magnetization of one of the layers, acting as a reference layer, is fixed and
kept rigid in one given direction. The other layer, acting as the storage layer, can be switched
under an applied magnetic field from parallel to antiparallel to the reference layer, therein
inducing a change in the cell resistance of approximately 50%.


The first generation : Field-Induced Magnetic Switching (FIMS)
A fully functional MRAM memory is based on a 2D array of individual cells, which
can be addressed individually. In today’s architecture, each memory cell combines a CMOS
selection transistor with a magnetic tunnel junction and three line levels (see Fig. 2). (i) At
read, a low power current pulse in the lower line level ('control line') opens the transistor to
address the selected memory cell. The cell resistance is measured by driving a current from
the 'word line' through the MTJ (see Fig. 2a) and comparing to a reference cell located
somewhere in the array. (ii) At write, the “word lines” and “bit lines”, arranged in a crosspoint
architecture on each side of the MTJ, are energized by synchronized current pulses in
order to generate a magnetic field on the addressed memory cell (see Fig. 2b).



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