Abstract
A method for estimating the phase current unbalancein a multiphase buck converter is presented. The method uses theinformation contained in the voltage drop at the input capacitor’seffective series resistance (ESR) to estimate the average current ineach phase. Although the absolute estimation of the currents dependson the value of the ESR and is therefore not absolutely accurate,the relative estimates of the currents with respect to one otherare shown to be very accurate. The method can be implementedwith a low-rate down-sampling A/D converter and is not computationallyintensive. Experimental results are presented, showinggood agreement between the estimates and the measured values.Index Terms—Current sensing, current sharing, dc/dc converters,multiphase buck converter, voltage regulation modules(VRM).
I. INTRODUCTION
THE multiphase synchronous buck converter is the topologyof choice for low-voltage high-current dc/dc converterapplications [1]–[7]. The advantages of this topology arenumerous. In a converter with phases the ripple frequencyis , where is the switching frequency of each phase,therefore both the ripple is reduced and the requirements of theinput and output filters are relaxed. Each switch and inductorconducts times less current than in an equivalent conventionalbuck converter. Finally, there are more opportunities ofcontrol in one clock cycle, meaning that the delay in the controlloop gets reduced and a higher bandwidth can be achieved.However, the multiphase topology requires more componentsand a more complex controller. Furthermore, there is a potentialproblem with current unbalance. The thermal constraints aswell as the dimensioning of the semiconductors and inductors ofeach phase depend on the maximum current they deliver. If allphases are balanced, the maximum phase current is equal to themaximum load current divided by . However, small variationsin the characteristics of each phase could generate a significantcurrent unbalance, leading to the need to over design the components.Additionally, if the currents are not balanced properly,frequency components below are present in the input current.In conclusion, many of the advantages of the multiphasetopology are lost if the currents are not balanced. The topic of current sharing has been widely studied in thecontext of paralleling dc/dc converter modules (see, for example[8]–[10] and references therein). In general, it is assumed thatindividual current measurements are available and the informationis shared among the converters. In [8], a master-slave approachis presented. In [9], the average inductor current informationis shared among the converters. In [10], the informationcontained in the switching ripple is used. A classification of parallelingschemes and current-sharing methods can be found in[11].In a multiphase topology, the challenges are similar but thecontroller usually only needs the total current and not the individualphase currents for achieving a good dynamic response.As a consequence, for phase balancing purposes, auxiliary andlower-resolution phase current measurement circuits are employed.The most common phase-balancing methods in commercialhigh-current applications use phase current measurementsobtained by inductor sensing [2]–[4] or sensing[5]–[7]. Both methods require a priori knowledge of a parasiticseries resistance (inductor DCR in the former and MOSFETin the latter) for each phase and need to track its variationwith temperature. Other approaches have been proposed,like an inductor sensing variation [12] and a hysteretic controlmethod [13].In [14] and this work, a method for estimating the currentunbalance based on samples of the input voltage is described.The merit of this approach is that the same sensing element [theinput capacitor effective series resistance (ESR)] is used for allphases, thus eliminating the uncertainty when comparing measurementsfor different phases. Further, variations of the ESRvalue with temperature, frequency, and other parameters do notaffect the relative measurement of the phase currents with respectto one another. In [14], the input voltage is sampled directlyduring the conduction time of each phase, and the samplesare compared to obtain the unbalance information. However,the input voltage carries a lot of undesired high-frequencycontent due to the switching of large currents, dramatically reducingthe signal-to-noise ratio (SNR) of the sampled values,rendering the method impractical. Furthermore, if the on-timesof the different phases superpose (duty-cycle greater than ),the samples are not useful.In this paper, a different approach for sampling the voltageinput waveform is presented. Instead of relying on the instantaneousvalues of thewaveform, a frequency analysis is performedon a filtered version of the waveform. This approach results ina much better SNR. A linear relationship between the sampledwaveform and the amplitude of the phase currents is derived.The numerical processing required is equivalent to a low-ordermatrix-vector multiplication or a low-order fast Fourier transform(FFT), and needs to be updated at a slow rate.


Download full report
http://ieeexplore.ieeeiel5/63/4418431/04...er=4390080