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Title: randomised instuction set emulation
Page Link: randomised instuction set emulation -
Posted By: nit_cal
Created at: Friday 30th of October 2009 06:37:27 PM
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presented by:Tushar Karayil Ravindran
Randomized Instruction Set Emulation

Abstract
This topic deals with the security issue facing the modern computer systems.All the systems follow a specific standard to make them compatible and independent.So it is easy for an attacker to hit the vulnerability since he knows the standard that the system follows .Moerover the same attack will be successfull on al ....etc

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Title: Jini - advanced set of network protocols
Page Link: Jini - advanced set of network protocols -
Posted By: computer science crazy
Created at: Tuesday 24th of February 2009 02:46:04 AM
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Jini provides facilities for dealing with some of the Fallacies of Distributed Computing, problems of system evolution, resiliency, security and the dynamic assembly of service components. Code mobility is a core concept of the platform and provides many benefits including non-Protocol dependence. The Jini team at Sun Microsystems has always stated that Jini is not an acronym. Some have joked that it meant Jini Is Not Initials, but it's always been just Jini. The word Jini means the devil in Kiswahili; this is a loan from an Arabic word for ....etc

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Title: Assessment of SET Logic Robustness Through Noise Margin Modeling
Page Link: Assessment of SET Logic Robustness Through Noise Margin Modeling -
Posted By: project report helper
Created at: Wednesday 13th of October 2010 02:26:16 PM
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Assessment of SET Logic Robustness Through Noise Margin Modeling

Chaitanya Sathe, Surya Shankar Dan, and Santanu Mahapatra, Member, IEEE

Abstract—

A compact model for noise margin (NM) of single electron transistor (SET) logic is developed, which is a function of device capacitances and background charge (ζ). Noise margin is, then, used as a metric to evaluate the robustness of SET logic against background charge, temperature, and variation of SET gate and tunnel junction capacitances (CG and CT ....etc

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Title: testing An Interaction-Based Test Sequence Generation Approach for Testing Web
Page Link: testing An Interaction-Based Test Sequence Generation Approach for Testing Web -
Posted By: shravanm88
Created at: Wednesday 16th of March 2011 05:05:22 PM
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hi .iam shravan ..
iam doing m.tech (SE)
any one help me to do my project
title :

An Interaction-Based Test Sequence Generation Approach for Testing Web


this is IEEE 2008 paper .if any one had this paper please ..upload ppts and documentation and code ....etc

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Title: Reduced Instruction Set Computer RISC processor
Page Link: Reduced Instruction Set Computer RISC processor -
Posted By: project report helper
Created at: Friday 22nd of October 2010 06:36:25 PM
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Reduced Instruction Set Computer (RISC) processor

INTRODUCTION

This project is aimed at designing of a Reduced Instruction Set Computer (RISC) processor using the Verilog Hardware Description Language (HDL). For a long time, programming languages such as C, Pascal & FORTRAN were being used to describe the computer programs that were sequential in nature. Similarly in the digital design field, designers felt the need for a standard language to describe digital circuits. Thus, HDL came into exi ....etc

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Title: Discriminative Learing and Recognition of Image set classes Using Canonical Correlati
Page Link: Discriminative Learing and Recognition of Image set classes Using Canonical Correlati -
Posted By: mechanical engineering crazy
Created at: Friday 28th of August 2009 04:32:15 AM
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Discriminative Learing and Recognition of Image set classes Using Canonical Correlation

Abstract:

Canonical angles or principle angle between the two dimensional sub-space.

Canonical angle is compared with the two main classical methods: parametric distribution based and non parametric sample based.

The classical linear discriminate analysis which we have to develop is to be maximizing the correlation with-in the class set and it has to minimize between the class-set.

Image set after transforming the discrimi ....etc

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Title: Single electron tunneling SET transistor
Page Link: Single electron tunneling SET transistor -
Posted By: computer science topics
Created at: Tuesday 29th of June 2010 02:02:56 AM
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Single electron tunneling (SET) transistor

ABSTRACT
The chief problem that are faced by chip designers are regarding the size of the chip. According to Moores„¢s Law, the number of transistors on a chip will approximately double every 18 to 24 months. Moore\'s Law works largely through shrinking transistors-the circuits that carry electrical signals. By shrinking transistors, designers can squeeze more transistors into a chip. However, more transistors means more electricity and heat compressed into an even smaller space. F ....etc

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Title: microcontrollers based on CISC architecture RICS stands for Reduced Instruction Set
Page Link: microcontrollers based on CISC architecture RICS stands for Reduced Instruction Set -
Posted By: seminar surveyer
Created at: Wednesday 13th of October 2010 05:59:24 PM
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Difference between CISC and RISC:
CISC stands for Complex Instruction Set Computer. Most PC's use CPU based on this architecture. For instance Intel and AMD CPU's are based on CISC architectures. Typically CISC chips have a large amount of different and complex instructions. In common CISC chips are relatively slow (compared to RISC chips) per instruction, but use little (less than RISC) instructions. MCS-51 family microcontrollers based on CISC architecture.
RICS stands for Reduced Instruction Set Computer ....etc

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Title: Fuzzy set theory
Page Link: Fuzzy set theory -
Posted By: seminar surveyer
Created at: Tuesday 12th of October 2010 06:38:42 PM
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Introduction

Many decision-making and problem-solving tasks are too complex to be understood quantitatively, however, people succeed by using knowledge that is imprecise rather than precise. Fuzzy set theory, originally introduced by Lotfi Zadeh in the 1960's, resembles human reasoning in its use of approximate information and uncertainty to generate decisions. It was specifically designed to mathematically represent uncertainty and vagueness and provide formalized tools for dealing with the imprecision intr ....etc

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Title: Testing Of Bearings on Sound and Vibration Quality full report
Page Link: Testing Of Bearings on Sound and Vibration Quality full report -
Posted By: seminar class
Created at: Wednesday 27th of April 2011 04:55:21 PM
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Presented by:
HIREN R PATEL


-: ABSTRACT:-
Bearings are valuable.... until they go bad, and then they are worthless. But the definition of Bad Condition of Bearing is not standardized yet. To quickly discover what bearings may be salvaged, we offers positive testing machine. Because “A Bearing Saved is a Bearing Earned”. We tried to compare the bearings on ideal and defective condition on Sound and Vibration factor. For Sound we used microphone and for Vibrations we implemented piezoelectric sensor. Instea ....etc

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