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Title: Design a New Speech Encoder for Cochlear Implants Using DRNL model presentation
Page Link: Design a New Speech Encoder for Cochlear Implants Using DRNL model presentation -
Posted By: seminar topics
Created at: Tuesday 16th of March 2010 12:40:57 PM
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Design a New Speech Encoder for Cochlear Implants Using DRNL model.

Agenda:
Introduction.
Cochlear implant devices.
Methodologies.
Comparisons.
Proposed methodology.
Conclusion.

Introduction

Today, a prosthetic device, called cochlear implant, can be implanted in the inner ear and can restore partial hearing to profoundly deaf people.
Prosthetic device processors utilize the channel vocoder .





C.I Devices

Methodologies
Single Channel implants:
It provide electrical stim ....etc

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Title: DESIGN AND IMPLEMENTATION OF GOLAY ENCODER AND DECODER
Page Link: DESIGN AND IMPLEMENTATION OF GOLAY ENCODER AND DECODER -
Posted By: computer science crazy
Created at: Thursday 17th of September 2009 04:29:37 AM
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DESIGN AND IMPLEMENTATION OF GOLAY ENCODER AND DECODER


The encoder and decoder, which are designed in this project, are useful in error detection and correction of digital data. Many error detection and correction standards employ cyclic codes like Golay codes because of their special properties that makes it easier to encode and decode these codes in an efficient manner. The error correction aspect of these codes is very important in areas like Satellite Communication where it is often impossible to retransmit the information if an error ....etc

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Title: Design of Manchester Encoder-decoder in VHDL
Page Link: Design of Manchester Encoder-decoder in VHDL -
Posted By: seminar projects crazy
Created at: Friday 14th of August 2009 06:30:15 PM
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Abstract

VHDL is an acronym which stands for VHSIC Hardware Description Language. VHSIC is yet another acronym which stands for Very High Speed Integrated Circuits
VHDL can wear many hats. It is being used for documentation, verification, and synthesis of large digital designs. This is actually one of the key features of VHDL, since the same VHDL code can theoretically achieve all three of these goals, thus saving a lot of effort.

In addition to being used for each of these purposes, VHDL can be used to take three different approaches to ....etc

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Title: Design of Manchester Encoder-decoder in VHDL
Page Link: Design of Manchester Encoder-decoder in VHDL -
Posted By: seminar projects crazy
Created at: Friday 14th of August 2009 06:55:01 PM
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Abstract

VHDL is an acronym which stands for VHSIC Hardware Description Language. VHSIC is yet another acronym which stands for Very High Speed Integrated Circuits
VHDL can wear many hats. It is being used for documentation, verification, and synthesis of large digital designs. This is actually one of the key features of VHDL, since the same VHDL code can theoretically achieve all three of these goals, thus saving a lot of effort.

In addition to being used for each of these purposes, VHDL can be used to take three different approaches to ....etc

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Title: hdb3 decoder rules
Page Link: hdb3 decoder rules -
Posted By:
Created at: Thursday 14th of March 2013 06:01:14 PM
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give rules for high density bipolar 3 code decoder rules ....etc

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Title: simulink hdb3
Page Link: simulink hdb3 -
Posted By:
Created at: Thursday 01st of March 2018 04:49:32 AM
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Hi am ElMehdi, I would like to get details on simulink hdb3 .. I think that this is not available by default in the simulink tool, I need to do a simulation of a transmission chain that uses a digital entery coded in HDB3 as an information to modulate it and transmit it after that. ....etc

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Title: A Design of HDB3 CODEC Based on FPGA
Page Link: A Design of HDB3 CODEC Based on FPGA -
Posted By: projectsofme
Created at: Saturday 27th of November 2010 03:09:44 PM
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A Design of HDB3 CODEC Based on FPGA


ABSTRACT
The basic principles and structure of HDB3 was briefly introduced in this paper, and the shortcomings of the existing HDB3 encoder and decoder was analyzed. Then a new design of HDB3 encoder and decoder based on FPGA was proposed, and the hardware design circuit and software simulation were introduced. The simulation was achieved through the VERILOG-HDL in EP2C35F672C8 chip of CycloneII series in the d ....etc

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Title: design and implementation of incremental encoder based position and velocity measurement chip
Page Link: design and implementation of incremental encoder based position and velocity measurement chip -
Posted By:
Created at: Saturday 21st of September 2013 06:44:50 PM
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I need base paper of Design and implementation of Incremental Encoder based position and velocity measurement chip..plz frwd me...i have to submit 25th of this month ....etc

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Title: design of manchester encoder decoder in vhdl thesis
Page Link: design of manchester encoder decoder in vhdl thesis -
Posted By:
Created at: Saturday 15th of December 2012 10:39:53 AM
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plz provide full documentation for manchester encoding and decoding using vhdl ....etc

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Title: hdb3 arduino
Page Link: hdb3 arduino -
Posted By:
Created at: Wednesday 22nd of June 2016 10:24:48 PM
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Communicating by hdb3 Arduino ?
Arduinos want to communicate two ethernet HDB3 coded to send data and recivirlos, you can read them but I have doubts on how to do I can help ....etc

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