please can send me the vhdl code for the ieee paper which was mentioned above ....etc

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VMSK(very minimum shift keying modulation) ,for very minimum shift keying modulation, is one of the ultra narrow band modulation (UNBM) methods claimed to send high speed digital data through very low bandwidth (or narrowband) channels. ....etc

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85/2014
Maximum : 100 marks
Time : 1 hour and 15 minutes

1. V belt run in-------------------degree v-groove.
(A)60°
(B)55°
(C )29°
(D)40°

2. The -----------------is the operation of forming the edges of a component into roll by bending the sheet metal in order to strengthen the edges and to provide smoothness to its surface :
(A)Bending
(B)Curling
(C )Lancing
(D)Forming

The back gear system of a lathe is used to :
(A)Reduce the spindle speed
(B)Increase the spindle speed
(C )Only used in thread cut ....etc

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GMSK:
Gaussian Filtered Minimum Shift Keying
Gina Colangelo
EE194 - SDR
Topics
Background
Minimum Shift Keying (MSK)
Gaussian Filtering
Spectral Efficiency GMSK vs. MSK
Common Applications
Introduction
Digital modulation schemes are becoming increasingly important in wireless communication systems.
Using an unfiltered binary data stream to modulate an RF carrier will produce an RF spectrum of considerable bandwidth.
Techniques have been developed to minimize this bandwidth, improve spectral performance, and ease detection.
Bac ....etc

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SUBMITTED BY:
ANKUSH GOYAL


Introduction
A linear feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. The only linear function of single bits is xor, thus it is a shift register whose input bit is driven by the exclusive-or (xor) of some bits of the overall shift register value.
The initial value of the LFSR is called the seed, and because the operation of the register is deterministic, the stream of values produced by the register is completely dete ....etc

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Power Factor Correction of Linear and Non-linear Loads Employing a Single Phase Active Power Filter Based on a Full-Bridge Current Source Inverter Controlled Through the Sensor of the AC Mains Current
Abstract:
In the last years the number of non-linear loads has been increasing rapidly. This non-linear load had drawn a current form the AC Mains with harmonic components, leading to low power factor, low efficiency, interference by the EMI, among others. A classic solution is the use of passive filters, which ....etc

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Abstract
Low power VLSI circuit design is one of the most important issues in present day technology. One of the ways of reducing power in a CMOS circuit is to reduce the number of transitions on the bus and Bus Invert Coding is a widely popular technique for that. In this paper we introduce a new way of coding called the ShiftInv Coding that is superior to the bus invert coding technique. Our simulation results show a considerable reduction on the number of transitions over and above that obtained with bus invert coding. Further, the propos ....etc

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Abstract:
frequency shift keying (FSK) is a method for representing digital data with analog signals by using a change in the frequency of the carrier to represent information. It is thus a type of modulation. FSK with two frequencies, corresponding to the digital values 0 and 1 (see diagram) is the primary method used by low-speed modems.FSK is a low performance type of digital modulation. Binary FSK is a form of constant amplitude angle modulation, ....etc

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POWER OPTIMIZATION OF LINEAR FEEDBACK
shift REGISTER(LFSR)FOR LOW POWER BIST



ABSTRACT

This project proposes a low power LFSR for TPG technique with reducing power dissipation during testing .
The correlations between the consecutive patterns are higher during normal mode than during testing
The proposed approach uses the concept of reduce the transitions in the test pattern generated by conventional LFSR. The transition is reduced by increasing the Correlation between the successive b ....etc

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SHIFT REGISTER BASED DATA TRANSPOSITION COST EFFECTIVE DCT

Abstract:- This paper presents a cost-effective 2-D-discrete cosine transform (DCT) architecture based on the fast row/column decomposition algorithm. We propose a new schedule for 2-D-DCT computing to reduce the hardware cost. With this approach, the transposed memory can be simplified using shift-registers for the data transposition between two 1-D-DCT units. A special shift cell with MOS circuit is designed by using the energy transferring methodology. The memory size can be great ....etc

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