Itanium Processor seminars report
#3
Brick 
[attachment=6100]
LIWIA WILZ
S7 CSE A


Itanium Processor


ABSTRACT

The Itanium brand extends Intel’s reach into the highest level of computing enabling powerful servers and high- performance workstations to address the increasing demands that the internet economy places on e-business. The Itanium architecture is a unique combination of innovative features, such as explicit parallelism, predication, speculation and much more.

In addition to providing much more memory that today’s 32-bit designs, the 64-bit architecture changes the way the processor hardware interacts with code. The Itanium is geared toward increasingly power-hungry applications like e-commerce security, computer-aided design and scientific modeling.

Intel said the Itanium provides a 12-fold performance improvement over today’s 32-bit designs. Its “Explicitly Parallel Instruction Computing”(EPIC) technology enables it to handle parallel processing differently than previous architectures, most of which were designed 10 to 20 years ago. The technology reduces hardware complexity to better enable processor speed upgrades. Itanium processors contain “massive chip execution resources”, that allow “breakthrough capabilities in processing terabytes of data”.

Here a sincere attempt is made to explore the architecture feature and performance characteristic of Itanium processor. A brief explanation on the system environment and their computing applications is also undertaken.


INTRODUCTION


Itanium is the first processor to use EPIC(Explicit Parallel Instruction Computing) architecture.Its performance is to be better than the present day Reduced Instruction Set Computing and Complex
Instruction Set Computing(RISC & CISC).

In modern Processors,including Itanium,a multiplicity
of arithmetic-logic or floating-point on-chip units execute several instructions in parallel.Ideally,increasing the number of execution units should increas the number of extra instructions per clock cycle proportionally.But conventional processors also needs a lot of extra on-chip circuitry to schedule and track the instruction progress,which takes up valuable space,consumes power and add steps to the execution process.
As a result only a slight improvement in the number of instructions per clock cycle occurs when the number of execution units are increased.Instead EPIC
architects use a compiler to schedule instructions.

An excellent scheduler ,it makes parallelism explicit to th processor.It bundles instructions into 128-bit packets containing up to three instructions plus information about the interdependencies.Less scheduling and tracking circuitry is needed on the chip and the extra information in each bundle allows the architecture to be scalable so that programs compiled for todays itanium systems will not need recompilation for future generations of the chip.

ITANIUM PROCESSOR FAMILY


The itanium processor family came about for several reasons,but the primary one was that the processor architecture advances of RISC were no longer growing at the rate seen in the 1980’s or the 1990’s.Yet,customers continued
to demand greater application performance,due to the following developments:
• Increased users and demand(internet)
• Higher bandwidth tasks(streaming)
• Requirements for secure processing(SSL)
• Larger hardware requirements(Very Large Data Bases)
• Support for multi-OS environments(virtual data center,computing as a utility)

The Itanium processor family was developed as a response to address the future performance and growth needs of business,technical ,and scientific users with greater flexibility,better performance and a much greater ‘bang for the buck’ in the price performance arena.

The Itanium architecture achieves a more difficult goal than a processor that could have been designed with ‘price as no object’.Rather,it delivers near-peerless speed at a price that is sustainable by the mainstream corporate market.some of the features that this processor brings to the follow below:
• Floating-point performance for compute intensive applications
• EPIC technology for maximum parallelism &HW\SW synergy
• Scalability from 1-way to128-way+
• 64-bit addressing and high bandwidth










BENEFITS OF ITANIUM PROCESSORS IN DIFFERENT PLATORMS

*How Will I Benefit if I Run a RISC-Based System?

Enterprises that run RISC-based systems gain an immediate benefit from the switch to an Itanium-based platform.The lower hardware costs and multi-vendor OS strengths of the new industry-standard architecture,
Explicitly Parallel Instruction Computing(EPIC),provide for the following benefits:
• Multi-OS support
• Lower overall Cost of Ownership for enterprise IT
• Assurance of leading performance and scalability over the long-term

*How will I Benefit if I Run an IA-32 Based System?

IA-32 based system users will se immediate performance gains when taking on more complex workloads and processing large amounts of data.Areas that are less sensitive to performance can transition to the new architecture on an as-needed basis.Organizations that move to an Itanium –based platform can address current performance issues points today and gain familiarity with architecture that will be able to keep up with scalable demands in the near and imtermediate future.These demands include:
• Greater memory addressability
• More complex applications and computing environments
• Secure web server transactions
• Computer aided design such as Mechanical Analysis
• Very large memory databases

Reply

Important Note..!

If you are not satisfied with above reply ,..Please

ASK HERE

So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Popular Searches: itanium processor and the steamship titanic, itanium processor 9300, peerless pwa, i7 processor seminar report and ppt, complete report on itanium processor, seminar on network processor, seminar topic for i5 processor,

[-]
Quick Reply
Message
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Messages In This Thread
RE: Itanium Processor seminars report - by projectsofme - 15-10-2010, 09:39 AM

Possibly Related Threads...
Thread Author Replies Views Last Post
  blast seminars report electronics seminars 6 15,353 09-09-2017, 04:08 PM
Last Post: jaseela123d
  Electronics seminars lists10 computer science crazy 169 92,351 28-03-2015, 10:07 AM
Last Post: seminar report asees
  gsm pdf and final seminars report suvendu9238 10 11,881 19-11-2014, 09:34 PM
Last Post: jaseela123d
  optical switching seminars report electronics seminars 7 10,631 29-04-2013, 10:55 AM
Last Post: computer topic
  memristor seminars report project report tiger 21 22,912 25-01-2013, 12:02 PM
Last Post: seminar details
Smile smart note taker seminars full report [email protected] 59 31,423 25-01-2013, 12:00 PM
Last Post: seminar details
  iris scanning seminars report electronics seminars 7 11,912 17-12-2012, 11:36 AM
Last Post: seminar details
  IMAGE AUTHENTICATION TECHNIQUES seminars report electronics seminars 6 8,625 15-11-2012, 12:24 PM
Last Post: seminar details
  FOUNDATION FIELDBUS seminars report seminar surveyer 3 3,812 09-11-2012, 11:15 AM
Last Post: seminar details
  LEON SPARC V8 Processor computer girl 0 786 08-06-2012, 01:16 PM
Last Post: computer girl

Forum Jump: