12-06-2012, 12:40 PM
3-D IC TECHNOLOGY
3-D IC TECHNOLOGY-2(1).pptx (Size: 917.17 KB / Downloads: 0)
Introduction
Twice the no of transistor in IC for 18months.
Interconnect shrinkage has negative effect on device performance.
Tighter pitches have raised capacitance i.e. RC delay.
Memory latency has also suffered.
Leveled off clock speed.
3D IC live up these technical issues.
Motivation
Technology needs Portable & reliable IC.
3-d IC design live up advanced generation.
More power & delays.
Increase the number of “nearest neighbors”.
What is a 3D IC?
Multi Layer Integrated Circuit.
Integrated both Vertical &
Horizontal.
Layers work in harmony.
Limit thermal hot spots.
3D Fabrication Technologies
Monolithic— on single semi conductor.
Wafer –on- wafer– on two or more
semiconductors.
Die-on-wafer- on two semiconductors.
Die-on-Die- on multiple dice.
