I NEED DC MOTOR CONTROL USING FPGA.USING PWM TECHNIQ WITH BLOCK DIAGRAM.

vhdl code for brushless dc motor controller fpga

ABSTRACT

Because of its high performance, brushless DC motors are widely used in motor vehicles. In this paper, according to analysis of present motor control system, a novel hardware structure of motor control system was presented. It is based on Field Programmable Gate Arrays (FPGA) and Digital Signal Processor (DSP). According to the function needed in motor control and the structure feature of FPGA and DSP, the tasks taken by FPGA and DSP were divided. A functional design of FPGA in a brushless DC motor system based on FPGA and DSP was completed by using modular design method. All the function modules are programmed by Very-High-Speed Integrated Circuit Hardware Description Language (VHDL).The function modules implemented in FPGA were introduced in detail. The advantage of the system is its good operational performance and expansibility. The application of FPGA can greatly simplify the design of peripheral circuits and release DSP from tedious operation. The simulation and experiment results verified its validity, and it can also act as an example for the application of FPGA in motor control field. This paper describes how to implement a functional Brushless DC Motor open-loop speed controller from simple IOPT Petri Net models, using the integrated development environment offered by IOPT-Tools, without the need to manually write software or hardware descriptions. IOPT nets are a Petri net class specifically designed to support the implementation of embedded system controllers. The IOPT-Tools Web service (http://gres.uninova.pt) includes an interactive graphical editor to design IOPT models, a model-checking framework consisting of a state-space generator and a query system, and automatic code generation tools to produce software © or hardware (VHDL) controller implementations. The Brushless DC Motor speed controller was decomposed into several subsystems, including a noise-filter, quadrature-decoder, PWM generator and an BLDC commutation-manager. These sub-systems were modeled using simple IOPT models, analyzed using the model-checking tools, resulting in the automatic creation of VHDL modules for each sub-system. To finish the entire project, a top VHDL module is used to instantiate copies of the automatically generated components and specify signals to connect the components to the external world. With the addition of an inverter board, a working prototype was implemented and successfully tested.