Abstract
New nanotechnology-based devices are being researchedto replace CMOS devices in order to overcome CMOStechnology’s scaling limitations. However, many such devicesexhibit nonmonotonic I–V characteristics and uncertain propertieswhich lead to the negative differential resistance (NDR)problem and the chaotic performance. This paper proposes twonew circuit simulation approaches that can effectively simulatenanotechnology devices with uncertain input sources and negativedifferential resistance problem. A new tool called NanoSim-RTDis developed based on the proposed new simulation techniques.The experimental results show a speedup of 1.48–37.1 times whencompared with existing simulators. Further, this paper demonstratesa new way to design delay-insensitive nanocircuits, and thedesigns can be verified by using NanoSim-RTD.Index Terms—Asynchronous, bias-based, resonant tunneling devices,stepwise equivalent conductance.
I. INTRODUCTION
DUE TO THE increasing circuit complexities and scalinglimits of the CMOS devices, new devices, such as resonanttunneling diodes (RTDs), resonant tunneling transistors (RTTs),and carbon nanotubes (CNTs), are being investigated to replacethe traditional CMOS devices. Different from existing CMOSdevices, the new devices exhibit nonmonotonic I–V characteristicswhich consist of multiple peaks and valleys. In addition,new devices may also demonstrate strong sensitivity towardsuncertain environmental changes. The nonmonotonic I–V characteristicsand the response to uncertain changes are the twomain issues in the circuit modeling and simulation of nanodevices.The traditional deterministic circuit simulators such as SPICEestimate the nonlinear device performance by the differentialconductance technique together with Newton–Raphson (NR) iterations.When used to simulate nonmonotonic I–V characteristics,differential conductance technique introduces negative differentialresistance problem which either causes oscillations ofNR iterations or results in false convergence during transient simulation. When applied to analyzing systems with uncertainsources, especially time variant uncertain sources, SPICE-likedeterministic simulators require several hundreds to over thousandsof Monte Carlo simulations at each time point. The highcomputational complexity at each time step makes traditionalcircuit simulators unable to analyze practical circuits.Recent research work attempts to modify the NR methodto force it to converge to meaningful solutions. For example,Bhattacharya and Mazumder [1] proposed current stepping andtime-step auto reduction schemes to modify the SPICE simulators.Le et al. in [2] proposed a piecewise linear approach toreplace NR iterations. The paper approximated the nonlinearnanodevice by piecewise linear conductance. By applying anadaptive time-step control mechanism together with the currentstepping approach, the method generates accurate results withinreasonable run time. The authors implemented their approach ina timing simulator called Adaptively Controlled Explicit Simulation(ACES).This paper presents two new approaches for nanocircuitmodeling and analysis. The first approach models the nanodeviceas stepwise equivalent conductance (SWEC) to avoidnonlinear device-related NR iterations. The SWEC techniquewas first proposed by Shen et al. [3], [4]. A timing simulator,called SWEC, was developed by them that achieved an orderof magnitude improvement over SPICE. We extend the SWECidea to provide deterministic simulation results for RTD typenanocircuits. In cases of nonmonotonic I–V characteristics,the SWEC approach always models the devices as positiveconductance. Thus, the SWEC technique completely preventsthe occurrence of the NDR characteristic. The second approachpredicts nanocircuit performance with uncertain inputs by a newstochastic integration technique called the Euler–Maruyamamethod (EM). Equivalent to Euler integration approaches in deterministicdifferential equations, the EM method numericallyintegrates the stochastic differential equations in time domainto approximate the solutions at each time step. As an example,a new tool called NanoSim-RTD is developed by using theabove two proposed techniques for both deterministic RTDsimulation and stochastic RTD simulation.The remainder of this paper adheres to the following format.Section II summarizes the anticipated characteristics of nanoelectronicdevices and the existing techniques for the simulationof nanocircuits. Section III discusses the features and methodologyofSWEC and its application to RTDs. Section IV explainsthe EM-based performance prediction. In Section V, we presentthe results, and Section VI concludes this paper.


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