LOW POWER VLSI
#1

Presented by:
K.Sai Nath
A.Deepak Kumar

[attachment=11642]
Abstract
- Low power chip requirement
month.Althougy after few year VLSI
in the VLSI industry is main considerable
industry will reach to its saturation
field due to the reduction of chip
condition i.e. growth rate of density of
dimension day by day and environmental
component will not increase as recent
factors. In this paper various low power
years but demands of portable, long
techniques at Gate level, Architecture
durable, lighter battery will never
level and different tradeoffs between
decrease. Specific weight (stored energy
different clock distribution schemes like
per unit weight) of batteries barely
as single driver clock scheme and
double in several years.Besides
technological issues, further increase in
distributed buffers clock scheme are
reviewed. Here it is also tried to showing
specific weight will soon draw safety
various effects of particular clock
concern because the energy density is
distribution scheme such as clock skew,
approaching that of explosive chemicals.
clock jitter etc.
So battery technology alone will not
solve the low power problem in near
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