Abstract
The development process within the electronicsdesign chain is adjusting to requirements caused bythe complexity of today’s and tomorrow’s Systemon Chip (SoC) designs. Design for re-use isbecoming a standard practice, sets newrequirements for next generation tools and isleading to organizational changes withincompanies.Since 1998, we have discussed design methodologyand tool requirements that would allow designersto create IP-dominated (SOC) devices at the systemlevel of abstraction. This paper will review lessonslearned in applying the proposed techniques to realdesign problems in the context of platform-baseddesign.Furthermore this paper will review differenttechniques for IP Authoring required for modernSoC design. Different models of computation haveto be supported to cover simulation andimplementation of control, data flow andcontinuous time processing. Furthermore thispaper will outline different techniques for IPIntegration, focusing on early interaction withinthe design chain, between IP Creators andIntegrators.The paper will close with lessons learned from userexperiences by analyzing and comparing differentuse models of IP authoring for re-use and IPintegration at the system level. Besides the modelrequirements for representing the IP blocksthemselves, different solutions for test benchauthoring and re-usable verification environmentswill be shown as well.
1. Introduction
Design of electronic products is currently undergoing aprofound revolution throughout all application fields. Thecomplexity of automotive, wireless and multimediaapplications has been exploding over the last couple ofyears and the productivity of design teams had difficultiesto keep up with this trend. Now this trend is even furtheraccelerated by the demand for convergence productscombining the disciplines of several application domains.Typical examples are the convergence of wirelesscommunications and video and audio processingcapabilities, and of course the entry of wireless andmultimedia applications into the car.
1.1. Market Drivers
Two trends were fairly obvious – the development of thecost of manufacturing and the complexity issues. Forsilicon providers the average cost of a high end ASSP andthe cost of fabrication and masks have increasedsignificantly. Looking at 5x to 10x times return on thedevelopment cost, formerly attractive chip volumes arelikely not be able to satisfy the return on investment needsin the future. On the other hand the task of system housesto efficiently design and verify embedded systems growsexponentially as embedded systems increase in capability.Facing these challenges designers are turning to newmethodologies – integration platform based design andfunction-architecture co-design approaches driven fromhigher levels of abstraction at the system level.In order for these two approaches to be applied toelectronics design it has become obvious that newtechnologies need to be made available by EDAcompanies which allow design at a higher level ofabstraction.The current techniques of translating written, ambiguousspecifications into register transfer level (RTL)descriptions for HW and C or assembler code forimplementation SW are clearly running out of steam.Designers can verify at that level of abstraction theinteraction of HW and SW using Co-Verification tools, thesimulation speed for the amount of detail to be simulatedat the complexity of today’s and tomorrow’s systems doesnot permit those techniques to make efficient designdecisions regarding system partitioning etc
.1.2. Platform Based Design
The concept of platform-based design for systems on chip(SOC) allows semiconductor companies to capitalize ofeconomy of scale for the silicon production. Severalapplication instances of the same application area can beimplemented on the same piece of silicon customizableand configurable using SW. The concept has beenintroduced in several publications, see [1], [2], [3] and [4].A SOC integration platform is defined as a highproductivity design environment, which specificallytargets a product application domain, and which is basedon a Virtual Component (VC) reuse, mix and matchdesign methodology. Another definition of platform is “afamily of architectures that satisfy a set of architecturalconstraints that are imposed to allow the re-use of HW andSW components”. Both of these definitions emphasize theconcept of reuse, and also imply the creation of a family ofderivative products based on a common platform HW-SWarchitecture.


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