Abstract—A novel technology for manufacturing high-performance
hydrogenated amorphous silicon (a-Si:H) thin-film
transistors (TFTs) is developed in this letter. In the bottom gate
light-shield a-Si:H TFT structure, the side edge of a-Si:H island
is capped with extra deposition of heavily phosphorous-doped
a-Si layer. Such an ingenuity can effectively eliminate the leakage
path between the parasitic contacts of source/drain metal and the
sidewall of a-Si:H island edge. In addition, electrical performance
of the novel a-Si:H TFT device exhibits superior effective carrier
mobility as high as 1.05 cm2 Vs, due to the enormous improvement
in parasitic resistance. The impressively high performance of
the proposed a-Si:H TFT provides the potential to apply foractive
matrix liquid crystal display and active matrix organic light-emitting
diode technology.
Index Terms—Hydrogenated amorphous silicon (a-Si:H), lightshield,
parasitic resistance, thin-film transistor (TFT).
I. INTRODUCTION
THE inverted-staggered back-channel etched (BCE) type of
hydrogenated amorphous silicon (a-Si:H) thin-film transistor
(TFT) has been widely used as a switching element to
control the gray level in liquid crystal display (LCD) [1], [2]
and to drive organic light-emitting diode (OLED) [3]–[5]. A
TFT with a large switch ratio and low off-state leakage current
is suitable to control LCDs. In addition, a-Si:H TFT with high
stability and driving capability is suitable for active matrix organic
LED (AMOLED) application.
The a-Si:H material is a well-known photoconductor and its
conductivity increases drastically under illumination of a visible
light [6], [7]. However, LCD panels are usually used in
an illumination environment as well as under the back-light.
Therefore, the leakage current of TFT under back-light illumination
in TFT-LCD displays should be reduced to avoid losing
Manuscript received June 8, 2005; revised July 5, 2005. This work was
supported by the AU Optronics Corporation (AUO) and the National Science
Council, Taiwan, R.O.C., under Contract NSC 93-2112-M-110-008. The
review of this letter was arranged by Editor J. Sin.
C.-W. Chen and T.-Y. Tseng are with Institute of Electronics, National Chiao-
Tung University, Hsinchu 300, Taiwan, R.O.C.
T.-C. Chang and K.-C. Wang are with Department of Physics and Institute
of Electro-Optical Engineering, Center for Nanoscience and Nanotechnology,
National Sun Yat-Sen University, Kaohsiung 804, Taiwan, R.O.C. (e-mail: tcchang@
mail.phys.nsysu.edu.tw).
P.-T. Liu is with Department of Photonics and Display Institute, National
Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C.
H.-Y. Lu is with Department of Photonics and Institute of Electro-Optical
Engineering, National Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C..
C.-S. Huang and C.-C. Ling are with Institute of Electronics, National
Tsing-Hua University, Hsinchu 300, Taiwan, R.O.C.
Digital Object Identifier 10.1109/LED.2005.855405
Fig. 1. (a) Conventional inverted-staggered a-Si:H TFT (structure A). (b)
Akiyamas light-shield a-Si:H TFT (structure B). © The new structure a-Si:H
TFT (structure C). The structure C consists of 20 nm n+ layer at the edge and
40 nm n+ layer on the top of the active island. In contrast, the other structures,
A and B, are based on a conventional BCE process and have 40 nm n+ layer.
the storage charges in the pixel. Akiyama et al. has demonstrated
the light-shield structure for the TFT using in AMLCDs
[6]. Fig. 1(a) and (b) shows the conventional inverted-staggered
BCE and Akiyamas structures, respectively. The major difference
between them is that a-Si:H island is completely located
inside the coverage of gate metal in Akiyamas structure. The
gate metal effectively shields the back-light irradiating to a-Si:H
layer. However, the edges of a-Si:H island are in direct contact
with the source/drain (S/D) electrodes, when the TFT fabricated
with the deposition of metal deposit on the tri-layer (SiN
Si H/n layer), as shown in Fig. 1(b). The metal/a-Si:H contact
usually exhibits the Schottky-type conduction [8], being
subjected to the leakage.
0741-3106/$20.00 © 2005 IEEE
732 IEEE ELECTRON DEVICE LETTERS, VOL. 26, NO. 10, OCTOBER 2005
We propose a new and convenient technology to reduce the
leakage current originated from the leaky contact between the
metal and a-Si:H layer in this study. Moreover, the turn-on current
of the proposed TFT is increased due to the reduction in parasitic
S/D resistance and is, thereby, suitable for driving OLED.
II. DEVICE STRUCTURE AND FABRICAION
The fabrication process of the proposed TFT device is similar
to the inverted staggered a-Si:H TFTs, but the a-Si:H active
island of the TFT is located inside the coverage of gate metal
electrode. First, metallic Cr was deposited on glass substrates
and then was patterned to form gate electrodes. SiN, undoped
a-Si:H and phosphorous-doped a-Si:H (n a-Si:H) layers were
deposited sequentially on the Cr patterned glass at a plasma-enhanced
chemical vapor deposition (PECVD) chamber. The film
thickness of Cr, SiNx, a-Si:H and n a-Si:H layerswas 150, 200,
150, and 20 nm, respectively. In our proposed TFT, the second
layer of 20-nm-thick n a-Si:H film was extra deposited to clad
the active regions. Aluminum film was evaporated to form the
source/drain (S/D) electrodes. In the manufacture process, only
three masks were required to fabricate TFT and the number of
masks is equal to the conventional BCE procedure. Fig. 1©
illustrates the new structure of our proposed light-shield TFT
device.


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