Abstract
This paper describes a single-chip CMOS quad-band(850/900/1800/1900 MHz) RF transceiver for GSM/GPRS applications.It is the most important design issue to maximize resourcesharing and reuse in designing the multiband transceivers. Inparticular, reducing the number of voltage-controlled oscillators(VCOs) required for local oscillator (LO) frequency generation isvery important because the VCO and phase-locked loop (PLL) circuitsoccupy a relatively large area.We propose a quad-band GSMtransceiver architecture that employs a direct conversion receiverand an offset PLL transmitter, which requires only one VCO/PLLto generate LO signals by using an efficient LO frequency plan.In the receive path, four separate LNAs are used for each band,and two down-conversion mixers are used, one for the low bands(850/900 MHz) and the other for the high bands (1800/1900 MHz).A receiver baseband circuit is shared for all four bands becauseall of their channel spaces are the same. In the transmit path,most of the building blocks of the offset PLL, including a TX VCOand IF filters, are integrated. The quad-band GSM transceiverthat was implemented in 0.25- m CMOS technology has a sizeof 3.3 3.2 mm2, including its pad area. From the experimentalresults, we found that the receiver provides a maximum noisefigure of 2.9 dB and a minimum IIP3 of 13.2 dBm for the EGSM900 band. The transmitter shows an rms phase error of 1.4and meets the GSM spectral mask specification. The prototypechip consumes 56 and 58 mA at 2.8 V in the RX and TX modes,respectively.Index Terms—CMOS, dc offset, direct conversion, frequency divider,GSM, LO frequency, offset phase-locked loop (PLL), quadband,transceiver.
I. INTRODUCTION
THE wide use of portable communication systems has createda great demand for low-cost, low-power, small formfactortransceivers. In the past, radio frequency (RF) front-endcircuits have been implemented with GaAs or bipolar junctiontransistor (BJT) technologies while the low-frequency basebandcircuits have used CMOS technologies. Such implementationsusing the technologies of different kinds, however, are not suitableas a low-cost solution for RF transceivers. In modern-dayimplementations, high-frequency CMOS circuits are becomingmore feasible due to the aggressive scale-down in CMOS technologies.Thus, the recent research trends have been to develop a monolithic transceiver with low-cost CMOS technologies [1],[2].The Global Systems for Mobile communication (GSM)network spanning over 200 countries is a rapidly growing andevolving mobile standard [3]. It is the first cellular system thatspecifies digital modulation and network-level architecturesand services [4]. There are several frequency bands where GSMterminals are or will shortly be operated. Therefore, a GSMterminal that can support all of the GSM frequency bands listedin Table I will be more useful for its global roaming [3], [5].Previously, there have been several works related to GSMtransceivers [6]–[11]. EarlyGSMtransceivers [6]–[8] employedthe super-heterodyne architecture to integrate the receiver andtransmitter in a single chip. However, they were implementedwith BJT technology and did not integrate all of the functions,requiring several external components, such as an IF filter. Althoughthe GSM transceivers [9], [10] developed later wereimplemented with low-cost CMOS technology, they still requiredseveral off-chip filters for image rejection and channelselection [9] or deferred these tasks to their baseband digitalsignal processing (DSP) chip [10]. Moreover, they supportedonly single-band communication, that is, the GSM900 band in[9] and the DCS1800 band in [10]. A GSM transceiver that supportsthe quad bands (850/900/1800/1900 MHz) [11] was implementedwith BiCMOS technology. It employed a direct conversionreceiver (DCR) and achieved a considerably high integrationlevel. However, the TX IF filters and loop filters were notintegrated. Moreover, its frequency doubler and subharmonicmixers (SHMs), which consume a large bias current, are difficultto be implemented in CMOS technology due to the relativelysmall transconductance of the MOS transistors.In order to overcome these problems, we have proposed asingle-chipCMOS RF transceiver architecture for the fourGSMbands (850/900/1800/1900 MHz). The proposed transceiverarchitecture employs a direct-conversion receiver and an offsetPLL transmitter. The rest of this paper is organized as follows.In Section II, we explain the proposed architecture of the GSMquad-band transceivers in CMOS technology. Moreover, wealso describe how we obtained an efficient LO frequency planthat is suitable for area reduction, low-power consumption, andprecise generation in the proposed architecture. The majorcircuit blocks of the transceiver are described in Section III.The experimental results of the prototype GSM transceiverare presented in Section IV. Finally, the conclusion is given inSection V.


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