AUTOMATED TRAFFIC SIGNAL CONTROLLER

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Presented By:
Anand Kokkanavar
Natthaphat Rojanasupamit
Prabhat Kumar Shukla

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Main Features of the Controller

Assumes equal traffic density on all the roads.

2. Allows the pedestrians to safely cross the road
during certain periods.

Uses digital logic, can be easily implemented by
using logic gates.

4. Is generalized and can be used for different roads
with slight modification.

5. Can also be exercised manually when desired.



Synchronous Decade Counter

Count from 0 to 9 (0000 to 1001 in binary).

For normal counting, the reset, preset,
count enable and carry in inputs should
all be high.

When count enable is low, the clock
input is ignored and counting stops.

The counter may be preset by placing
the desired binary number on the
inputs A-D, making the preset input
low, and applying a positive pulse to
the clock input.




General Description

A highly stable device for generating accurate
time delays or oscillation.

In the time delay mode of operation, the time is
precisely controlled by one external resistor and
capacitor.
In this Automated Traffic Signal Controller, Timer 555 is used as an Astable Multivibrator to generate clock

signal for the 4-bit counter 74160.





Bibliography

Digital Logic Applications and Design by John M. Yarbrough, Thomson
Fundamentals of Electronic Devices and Circuits by David A. Bell
Fundamentals of Logic Design by Charles H. Roth, Thomson
Synchronous Up/Down Counter by Stan, M. R. and Bufieson, W. P.
http://electronicsforuefylinux/circuit/nov2002/traffic.pdf
http://kpsec.freeukcomponents/74series.htm
http://en.wikipediawiki/555_timer_IC