ARM Programming


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ARM programmer model

The state of an ARM system is determined by the content of visible registers and memory.
A user-mode program can see 15 32-bit general-purpose registers (R0-R14), program counter (PC) and CPSR.
Instruction set defines the operations that can change the state.

Features of ARM instruction set

Load-store architecture
3-address instructions
Conditional execution of every instruction
Possible to load/store multiple register at once
Possible to combine shift and ALU operations in a single instruction

Data processing

Arithmetic and logic operations
General rules:
All operands are 32-bit, coming from registers or literals.
The result, if any, is 32-bit and placed in a register (with the exception for long multiply which produces a 64-bit result)
3-address format

Shifted register operands

One operand to ALU is routed through the Barrel shifter. Thus, the operand can be modified before it is used. Useful for dealing with lists, table and other complex data structure. (similar to the displacement addressing mode in CISC.)