A New Simplified Space–Vector PWM Method for Three-Level Inverters
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I. INTRODUCTION
RECENTLY, with the dramatic improvements in high
voltage technologies, high voltage insulated gate bipolar
transistor (HVIGBT) and gate commutated thyristor (GCT) are
expanding the area of their application. For the high performance
ac drive systems at increased power level, high quality
inverter output with low harmonic loss and torque pulsation
is necessary. In case of the conventional two-level inverter
configuration, the harmonic contents reduction of an inverter
output current is achieved mainly by raising the switching
frequency.


II. SIMPLIFIED SPACE–VECTOR PWM METHOD
A. Basic Principles of the Proposed SVPWM Method
Fig. 1 is a circuit diagram of a three-level inverter and the
switching states of each phase of the inverter are listed in Table I.
There are three kinds of switching states P, O, and N in each
phase, so there exist 27 switching states in three phase threelevel
inverter.


C. Calculation of the Dwelling Times
If the reference voltage vector is redefined as explained in
the previous section, the dwelling times are calculated at the
same manner as conventional two-level SVPWM method. The
calculation of dwelling times can be done more efficiently by
the method presented in [4] as shown in the following example.
In calculating the dwelling times, the only difference between
the two-level SVPWM and the three-level SVPWM is the factor
2 appearing at the first two lines of the following example.