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Title: Multicast Routing with Delay and Delay Variation Constraints for Collaborative Applic
Page Link: Multicast Routing with Delay and Delay Variation Constraints for Collaborative Applic -
Posted By: mechanical engineering crazy
Created at: Friday 28th of August 2009 04:34:53 AM
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Multicast Routing with Delay and Delay Variation Constraints for Collaborative Applications on Overlay Networks

Maximum variation in the delays from a source to the destinations. The time-complexity of our Algorithm is O (|E| +nk log (|E|/n) +m2 k), where n and |E| are the number of nodes and edges in the network, respectively, k is the Number of shortest paths determined, and Abstract”Computer supported collaborative applications on overlay networks are gaining popularity among users who are geographically dispers ....etc

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Title: COMPRESSORS PUMPS AND PIPELINE FITTINGS
Page Link: COMPRESSORS PUMPS AND PIPELINE FITTINGS -
Posted By: project report helper
Created at: Friday 08th of October 2010 12:43:42 PM
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COMPRESSORS, PUMPS, AND PIPELINE FITTINGS


B. S. Zakharov



It is shown that when sucker-rod pumps are used, fluid leakage in seals of plunger-cylinder and valve pair
through hole and radial slot is proportional to the area of the flow section and is also dependent on the
shape of the latter. A new type of mechanical seal has been developed that reduces leakage significantly
and increases efficiency and nonfailure operating life of piston or plunger pumps.
The key operational parameters of sucker-r ....etc

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Title: MONOLITHIC LOW-POWER 16 B 1 SAMPLES SELF-CALIBRATING PIPELINE ADC
Page Link: MONOLITHIC LOW-POWER 16 B 1 SAMPLES SELF-CALIBRATING PIPELINE ADC -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:27:50 AM
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MONOLITHIC LOW-POWER 16 B 1 SAMPLE/S SELF-CALIBRATING PIPELINE ADC

Abstract:- Pipelined architectures enable the implementation of high-speed, high-resolution, low-power analog-to-digital converters (ADCs). Concurrent processing of analog signals results in power and/or speed advantages over flash and multi step ADC architectures. While self-calibration techniques reduce the effects of component mismatches, the digital crosstalk due to correction circuitry can degrade the noise and linearity performance of the overall converter. Previous pip ....etc

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Title: A PIPELINE FAST FOURIER TRANSFORM FOR DIGITAL SPECTRUM ANALYSIS
Page Link: A PIPELINE FAST FOURIER TRANSFORM FOR DIGITAL SPECTRUM ANALYSIS -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:25:22 AM
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A PIPELINE FAST FOURIER TRANSFORM FOR DIGITAL SPECTRUM ANALYSIS

Abstract:- This paper describes a novel structure for a hardwired fast Fourier transform (FFT) signal processor that promises to permit digital spectrum analysis to achieve throughput rates consistent with extremely wide-band radars. The technique is based on the use of serial storage for data and intermediate results and multiple arithmetic units each of which carries out a sparse Fourier transform. Details of the system are described for data sample sizes that are binary multi ....etc

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Title: Online Clock Skew Scheme for Asynchronous Wave-Pipelined Circuits Using FPGA
Page Link: Online Clock Skew Scheme for Asynchronous Wave-Pipelined Circuits Using FPGA -
Posted By: seminar class
Created at: Friday 25th of March 2011 01:00:53 PM
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Presented by:
Deepthi Amuru


Abstract—Online clock skew scheme is proposed in this paper to improve the performance of the asynchronous wave-pipelined circuits. In conventional pipelining technique, the operating frequency is increased by dividing the combinational logic into number of stages and registers are introduced between the stages. Where, all the registers are fed with a global clock. Wave-pipelining technique maximizes the logic utilization without inserting internal registers so that we can achie ....etc

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Title: how to separate the wave signals from the mixed wave using ica in matlab code ppt
Page Link: how to separate the wave signals from the mixed wave using ica in matlab code ppt -
Posted By:
Created at: Wednesday 21st of November 2012 04:10:35 PM
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sir, i am doing project about detecting artifacts in eeg by using ica
plz help me to complete independent component analysis code ....etc

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Title: Optimum Pipeline Depth of a Microprocessor
Page Link: Optimum Pipeline Depth of a Microprocessor -
Posted By: nit_cal
Created at: Friday 30th of October 2009 06:28:31 PM
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Abstract
The effect of microprocessor pipeline depth on performance is considered. It is found that pipeline depth is a tradeoff between various factors, including the degree of superscalar processing, fraction of pipeline hazards, the fabrication technology of the processor, and the processor workload. The degree of instruction level parallelism decreases the optimal pipeline depth, while the lack of pipeline stalls increases the optimal pipeline depth. As we increase pipeline depth, there is a competition between greater pipeline throughput ....etc

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Title: Clock-Tree Power Optimization based on RTL Clock-Gating
Page Link: Clock-Tree Power Optimization based on RTL Clock-Gating -
Posted By: smart paper boy
Created at: Friday 29th of July 2011 01:08:33 PM
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ABSTRACT
As power consumption of the clock tree in modern VLSI designs
tends to dominate, measures must be taken to keep it
under control. This paper introduces an approach for reducing
clock power based on clock gating. We present a methodology
that, starting from an RTL description, automatically
generates a set of constraints for driving the construction of
the clock tree by the clock synthesis tool. The methodology
has been fully integrated into an industry-strength design
flow, based on Synopsys DesignCompiler (front-end) ....etc

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Title: DIGITAL VIDEO PIPELINE
Page Link: DIGITAL VIDEO PIPELINE -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:26:06 AM
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DIGITAL VIDEO PIPELINE

Abstract:- The Digital Video Pipeline provides a very modular way of connecting together any number of video circuits. Its unique pipelined structure also provides an inherent way of overlaying video. It refers to is Standard Definition BT656 YCbCr (4:2:2).

A full frame of interlaced video consists of two almost identical fields. The first field contains all the odd video lines and the second field contains all the even video lines. A field is made up of three distinct regions, first blanking period, active video an ....etc

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Title: Multicast Routing with Delay and Delay Variation Constraints for Collaborative
Page Link: Multicast Routing with Delay and Delay Variation Constraints for Collaborative -
Posted By: project topics
Created at: Friday 02nd of April 2010 12:55:59 PM
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Abstract”
Computer supported collaborative applications on overlay networks are gaining popularity among users who are geographically dispersed. Examples of these kinds of applications include video-conferencing, distributed database replication, and online games. This type of application requires a multicasting subnetwork, using which messages should arrive at the destinations within a specified delay bound. These applications also require that destinations receive the message from the source at approximately the same time. The problem ....etc

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