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Title: mechanical measurements and metrology notes
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Title: Design of a Low-Power High-Speed Current Comparator in 035-m CMOS Technology
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Design of a Low-Power High-Speed Current Comparator
in 0.35-μm CMOS Technology



Soheil Ziabakhsh1, Hosein Alavi-Rad1,
1Electrical Engineering, University of Guilan,
2Electrical Engineering Department,
3Engineering & Science Department, Sharif University of Technology, International Campus, Kish, Iran



Abstract


A novel low power with high performance low current comparator is proposed in this paper which comprises of low input impedance using a simple bia ....etc

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Title: mechanical measurements and metrology notes
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Title: low power high speed current comparator seminars ppt
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Title: LOW POWER HIGH SPEED SWITCHED CURRENT COMPARATOR
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LOW POWER HIGH SPEED SWITCHED CURRENT COMPARATOR


Y. SUN, Y.SWANG, F.C. LAI
HARBIN INSTITUTE OF TECHNOLOGY, CHINA



ABSTRACT:

Current mode implementation provides an alternative to high speed data conversion systems for low voltage applications. The pursuing of speed and accuracy of data conversion makes comparator critical. This paper presents a novel switched current (SI) comparator which achieves high speed without sacrificing either accuracy or power dissipation. Employing a class AB cur ....etc

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Title: A Low-Voltage Low-Power Comparator With Current-Controlled Dynamically-Biased Preampl
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A Low-Voltage Low-Power Comparator With
Current-Controlled Dynamically-Biased
Preamplifiers For DCM Buck Regulators


Hoi Lee
Department of Electrical Engineering,
The University of Texas at Dallas,
Richardson, TX 75080-3021, USA.



Abstract-


Comparator-controlled power switch has been widely used to improve power efficiencies of discontinuous-conductionmode (DCM) buck regulators. Some major design challenges are capabilities of the comparator to operate at low voltage and dissipat ....etc

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Title: srs of database concurrency comparator
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Title: CMOS COMPARATOR
Page Link: CMOS COMPARATOR -
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Created at: Wednesday 06th of June 2012 02:20:18 PM
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CMOS COMPARATOR



Designing the Comparator with NMOS Input Drivers


Determine the first stage biasing current using the minimum allowable size of (W/L)=1, and minimum output offset.
(a) Consider M4 and M6.
Using the minimum size for M4, determine the current ISD4 that mirror with M6. That is,


Designing the Comparator with PMOS Input Drivers


Determine the first stage biasing current using the minimum allowable size of 1, and minimum output of ....etc

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