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Title: Single-link failure detection in all-optical networks using monitoring cycles and pat
Page Link: Single-link failure detection in all-optical networks using monitoring cycles and pat -
Posted By: electronics seminars
Created at: Wednesday 13th of January 2010 10:17:39 AM
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Single-link failure detection in all-optical networks using monitoring cycles and paths

In this paper, we consider the problem of fault localization in all-optical networks. We introduce the concept of monitoring cycles (MCs) and monitoring paths (MPs) for unique identification of single-link failures. MCs and MPs are required to pass through one or more monitoring locations. They are constructed such that any single-link failure results in the failure of a unique combination of MCs and MPs that pass through the monitoring location(s). For ....etc

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Title: Single-link failure detection in all-optical networks using monitoring cycles and pat
Page Link: Single-link failure detection in all-optical networks using monitoring cycles and pat -
Posted By: pavanbabu
Created at: Friday 15th of January 2010 12:12:27 PM
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Title: Design of HDLC High Level Data Link Controller
Page Link: Design of HDLC High Level Data Link Controller -
Posted By: pradeepa arumugam
Created at: Thursday 04th of March 2010 01:25:22 AM
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I need abstract and objective for the title Design of HDLC core for data page link layer plz give me email me [email protected]
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Page Link: Goo - Happy New Year 2020 -
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Title: ATM a Data Link Layer protocol
Page Link: ATM a Data Link Layer protocol -
Posted By: computer science crazy
Created at: Thursday 17th of September 2009 03:29:44 AM
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ATM

ATM is simply a Data Link Layer protocol. It is asynchronous in the sense that the recurrence of the cells containing information from an individual user is not necessarily periodic. It is the technology of choice for evolving B-ISDN (Board Integrated Services Digital Network), for next generation LANs and WANs. ATM supports transmission speeds of 155Mbits / sec. In the future. Photonic approaches have made the advent of ATM switches feasible, and an evolution towards an all packetized, unified, broadband telecommunications and data comm ....etc

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Title: DUAL-LINK FAILURE RESILIENCY THROUGH BACKUP LINK MUTUAL EXCLUSION--JAVA
Page Link: DUAL-LINK FAILURE RESILIENCY THROUGH BACKUP LINK MUTUAL EXCLUSION--JAVA -
Posted By: santoshpathuri
Created at: Sunday 13th of March 2011 05:42:13 PM
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I want to do mini project on dual-link resiliency through back up page link mutual exclusion. so please send the complete information about the topic. if possible send the source code. my email id is
[email protected]. please send as early as possible. i hope u will replay me soon.thank you. ....etc

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Title: Dual-Link Failure Resiliency Through Backup Link Mutual Exclusion
Page Link: Dual-Link Failure Resiliency Through Backup Link Mutual Exclusion -
Posted By: computer science technology
Created at: Wednesday 20th of January 2010 12:24:36 PM
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Dual-Link Failure Resiliency Through Backup Link Mutual Exclusion

Abstract”
Networks employ page link protection to achieve fast recovery. While the first page link failure can be protected using page link protection, there are several alternatives for protecting against the second failure. This paper formally classifies the approaches to dual-link failure resiliency. One of the strategies to recover from dual-link failures is to employ page link protection for the two failed links independently, which requires that two links may ....etc

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Title: Design of HDLC High Level Data Link Controller
Page Link: Design of HDLC High Level Data Link Controller -
Posted By: pradeepa arumugam
Created at: Wednesday 03rd of March 2010 11:23:03 PM
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need abstract and more information about this project Design of HDLC (High Level Data Link Controller) core for data page link layer plz forward me [email protected] ....etc

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Title: PC Operated Car Using RF Link
Page Link: PC Operated Car Using RF Link -
Posted By: computer science topics
Created at: Tuesday 15th of June 2010 06:28:52 PM
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Abstract:

This Project envisaged developing a remote control car that would be controlled via RF Link. In this a hardware circuit is designed and interfaced with software running on the PC. The programming of the software has been designed in C++ language, which in turn gives command to the remote control car so that it can be operated accordingly. ....etc

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Title: Design of HDLC High Level Data Link Controller
Page Link: Design of HDLC High Level Data Link Controller -
Posted By: pradeepa arumugam
Created at: Thursday 04th of March 2010 01:25:42 AM
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I need abstract and objective for the title Design of HDLC core for data page link layer plz give me email me [email protected]
i hope you will forward ....etc

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