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Title: need of an adc
Page Link: need of an adc -
Posted By: rajathmb
Created at: Monday 05th of September 2011 07:47:39 PM
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i need to store real time values of an circuit output which varies from 5v to 24 v in a micro controller 8051 but my prob is as micro controller takes only digital values i need to use an ADC to convert but the limitation of ADC s 5v what can i do to capture the real time values. ....etc

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Title: 16-bit Booth Multiplier with 32-bit Accumulate
Page Link: 16-bit Booth Multiplier with 32-bit Accumulate -
Posted By: seminar surveyer
Created at: Thursday 07th of October 2010 02:18:41 PM
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Introduction

This report presents three main topics we investigated as part of a project to build a Booth encoded multiply/accumulate VLSI chip. The original scope of work included synthesizing VHDL code using the Mentor Graphics tools. Exemplar was the VHDL compiler. Leonardo Spectrum was the synthesizer. Since my team, which included Kevin Delaney, did not meet a Mosis deadline our chip funding was lost. Since we did not actually fabricate a chip, we cannot discuss the success of our results. Likewise, VHDL synthesis using the ....etc

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Title: pc as cro and signal storage using cpp and adc
Page Link: pc as cro and signal storage using cpp and adc -
Posted By: upendra256
Created at: Sunday 08th of August 2010 08:52:21 PM
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have a nice day....................... ....etc

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Title: Design of ADCDAC card and Interfacing With 8085 Microprocessor
Page Link: Design of ADCDAC card and Interfacing With 8085 Microprocessor -
Posted By: project report helper
Created at: Friday 22nd of October 2010 04:36:32 PM
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Design of ADC/DAC card and Interfacing With 8085 Microprocessor

Submitted By:
Pulkit Jain
Prateek Bhansali
Rocky Gupta




Abstract:

In this project we attempt to design a simple ADC/DAC card which can be easily interfaced with 8085 microprocessor kit for Data Acquisition(DAQ) purposes. We extent our work by designing a pcb

APPLICATION:

Commerical ADC/DAC cards can cost hundreds of dollars, not viable for teaching purposes. This ADC/DAC card, which is much cheaper can be us ....etc

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Title: History of 64-bit Computing AMD64 and Intel Itanium Processors 64-bit History
Page Link: History of 64-bit Computing AMD64 and Intel Itanium Processors 64-bit History -
Posted By: seminar class
Created at: Monday 28th of February 2011 12:02:21 PM
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History of 64-bit Computing: AMD64 and Intel Itanium Processors
64-bit History

• “640K ought to be enough for anybody” – Bill Gates
• 64-bit twice as fast as 32-bits?
• Benefits of 64-bit technology
• Applications of 64-bit technology
AMD64 Outline
• AMD Athlon 64 Specifications
• Operating Modes
• Register overview
• DDR controller and Hypertransport
AMD Athlon 64 Specifications
Infrastructure Socket 754
Number of Transistors 105.9 million
64-bit Instruction Set ....etc

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Title: CMOS TIME INTERLEAVED ADC full report
Page Link: CMOS TIME INTERLEAVED ADC full report -
Posted By: seminar presentation
Created at: Friday 21st of May 2010 10:18:40 PM
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ABSTRACT
A pipelined analog-to-digital converter (ADC) architecture suitable for high-speed (150 MHz), Nyquist-rate A/D conversion is presented. At the input of the converter, two parallel track-and-hold circuits are used to separately drive the sub-ADC of a 2.8-b first pipeline stage and the input to two time-interleaved residue generation paths. Beyond the first pipeline stage, each residue path includes a cascade of two 1.5-b pipeline stages followed by a 4-b “backend” folding ADC. The full-scale re ....etc

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Title: MONOLITHIC LOW-POWER 16 B 1 SAMPLES SELF-CALIBRATING PIPELINE ADC
Page Link: MONOLITHIC LOW-POWER 16 B 1 SAMPLES SELF-CALIBRATING PIPELINE ADC -
Posted By: computer science crazy
Created at: Friday 18th of September 2009 12:27:50 AM
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MONOLITHIC LOW-POWER 16 B 1 SAMPLE/S SELF-CALIBRATING PIPELINE ADC

Abstract:- Pipelined architectures enable the implementation of high-speed, high-resolution, low-power analog-to-digital converters (ADCs). Concurrent processing of analog signals results in power and/or speed advantages over flash and multi step ADC architectures. While self-calibration techniques reduce the effects of component mismatches, the digital crosstalk due to correction circuitry can degrade the noise and linearity performance of the overall converter. Previous pip ....etc

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Title: CMOS TIME INTERLEAVED ADC
Page Link: CMOS TIME INTERLEAVED ADC -
Posted By: shibin.sree
Created at: Monday 28th of December 2009 09:31:23 PM
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ABSTRACT

A pipelined analog-to-digital converter (ADC) architecture suitable for high-speed (150 MHz), Nyquist-rate A/D conversion is presented. At the input of the converter, two parallel track-and-hold circuits are used to separately drive the sub-ADC of a 2.8-b first pipeline stage and the input to two time-interleaved residue generation paths. Beyond the first pipeline stage, each residue path includes a cascade of two 1.5-b pipeline stages followed by a 4-b backend folding ADC. The full-scale residue range at the output of the pipeline ....etc

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Title: DAC and ADC converters
Page Link: DAC and ADC converters -
Posted By: project report helper
Created at: Friday 01st of October 2010 05:22:09 PM
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DAC and ADC converters

-Data Converter impacts the factor for the performance of the overall radio design
-Requirements: very high sampling rates, high number of effective quantization bits, an operating bandwidth of several Ghz, a large spurious-free dynamic range, a reasonable price
-DAC and ADC converters
-Sampling and Quantization
-Nyquist Zones
-Aliasing
-Bandpass filtering – uses image to translate bandpass signals to baseband
-Errors occurs in Quantization
-Quantization Noise
....etc

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Title: 8 bit adc to 8085 microprocessor interfacing
Page Link: 8 bit adc to 8085 microprocessor interfacing -
Posted By:
Created at: Saturday 13th of October 2012 05:47:28 PM
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interfacing of 8 bit ADC with 8085 description ....etc

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