02-05-2011, 10:07 AM
[attachment=13188]
1. INTRODUCTION
1.1 Introduction to Project:
END-TO-END packet delay is one of the canonical metrics in Internet Protocol (IP) networks, and is important both from the network operator and application performance points of view. For example the quality of Voice Over IP is directly dependent on delay, and network providers may have Service Level Agreements (SLAs) specifying allowable values of delay statistics across the domains they control. An important component of end-to-end delay is that due to forwarding elements, the fundamental building block of which is the delay incurred when a packet passes through a single IP router.
The motivation for the present work is a detailed knowledge and understanding of such “through-router” delays. A thorough examination of delay leads inevitably to deeper questions about congestion, and router queueing dynamics in general. We provide a comprehensive examination of these issues from three points of view: the understanding of origins, measurement, and reporting, all grounded in a unique data set taken from a router in the access network of a Tier-1 provider.
Although there have been many studies examining delay statistics and congestion measured at the edges of the network, very few have been able to report with any degree of authority on what actually occurs at switching elements. In an analysis of single hop delay on an IP backbone network was presented. Only samples of the delays experienced by packets, on some links, were identified. I single hop delays were also ob-tained for a router. However since the router only had one input and one output link, which were of the same speed, the internal queueing was extremely limited. In this paper we work with a data set recording all IP packets traversing a Tier-1 access router over a 13 hour period. All input and output links were monitored, allowing a complete picture of congestion, and in particular router delays, to be obtained.
This paper is based on a synthesis of material first presented in two conference papers and based on the above data set. Section VI-A contains new results. In part because it is both costly and technically challenging to collect, this data set, although now a few years old, to the best of our knowledge remains unique. Consequently, the same is true of the kind of analyzes it enables as presented here. What we emphasize in this presentation are the methodologies and approaches which have generic value. However, we believe that the detail and depth of the data analysis also makes this study worthwhile from the data archival point of view. Our specific conclusions are strictly speaking limited to a single data set with low loss and delay. However, since Tier-1 networks tend to be under provisioned, we believe it remains representative of backbone access routers and their traffic today. This conjecture requires testing against more data sets.
The first aim of this paper is a simple one, to exploit this unique data set by reporting in detail on the magnitudes, and also the temporal structure, of delays on high capacity links with nontrivial congestion. The result is one of the most comprehensive pictures of router delay performance that we are aware of. As our analysis is based on empirical results, it is not reliant on assumptions on traffic statistics or router operations.
Our second aim is to use the completeness of the data as a tool to investigate how packet delays occur inside the router. In other words, we aim to provide a physical model capable of explaining the observed delay and congestion. Working in the context of the popular store and forward router architecture, we are able to justify the commonly held assumption that the bottleneck of such an architecture is in the output buffers, and thereby validate the fluid output queue model relied on routinely in the field of active probing. We go further to define a refined model with accuracy close to the limits of time stamping precision, which is robust to many details of the architecture under reasonable loads.
Packet delays and congestion are fundamentally linked, as the former occur precisely because periods of temporary resource starvation, or microcongestion episodes, are dealt with via buffering. Our third contribution is an investigation of the origins of such episodes, driven by the question, “What is the dominant mechanism responsible for delays?”. We use a powerful methodology of virtual or “semi-” experiments, that exploits both the availability of the detailed packet data, and the fidelity of the router model. We identify, and evaluate the contributions of, three known canonical mechanisms:
i. Reduction in page link bandwidth from core to access;
ii. Multiplexing of multiple input streams;
iii. Burstiness of the input traffic stream(s).
To our knowledge, such a taxonomy of page link congestion has not been used previously, and our findings for this specific data set are novel and sometimes surprising. Our broader contribution however is the methodology itself, including a set of metrics which can be used to examine the origins of congestion and hence delay.
The fourth part of the paper gives an innovative solution to a nontrivial problem: how the complexities of microcongestion and associated delay behavior can be measured and summarized in a meaningful way. We explain why our approach is superior to attempting to infer delay behavior simply from utilization, an approach which is in fact fatally flawed. In addition, we show how this can be done at low computational cost, enabling a compact description of congestion behavior to form part of standard router reporting. A key advantage is that a generically rich description is reported, without the need for any traffic assumptions.
2. SYSTEM ANALYSIS
2.1 INTRODUCTION:
Using a unique monitoring experiment, we capture all packets crossing a (lightly utilized) operational access router from a Tier-1 provider, and use them to provide a detailed examination of router congestion and packet delays. The complete capture enables not just statistics as seen from outside the router, but also an accurate physical router model to be identified. This enables a comprehensive examination of congestion and delay from three points of view: the understanding of origins, measurement, and reporting. Our study defines new methodologies and metrics. In particular, the traffic reporting enables a rich description of the diversity of micro congestion behavior, without model assumptions, and at achievable computational cost.
2.2 EXISTING SYSTEM:
END-TO-END packet delay is one of the canonical metrics in Internet Protocol (IP) networks, and is important both from the network operator and application performance points of view. For example the quality of Voice Over IP is directly dependent on delay, and network providers may have Service Level Agreements (SLAs) specifying allowable values of delay statistics across the domains they control. An important component of end-to-end delay is that due to forwarding elements, the fundamental building block of which is the delay incurred when a packet passes through a single IP router.
2.3PROPOSED SYSTEM:
The motivation for the present work is a detailed knowledge and understanding of such “through-router” delays. A thorough examination of delay leads inevitably to deeper questions about congestion, and router queueing dynamics in general. We provide a comprehensive examination of these issues from three points of view: the understanding of origins, measurement, and reporting, all grounded in a unique data set taken from a router in the access network of a Tier-1 provider.
The first aim of this paper is a simple one, to exploit this unique data set by reporting in detail on the magnitudes, and also the temporal structure, of delays on high capacity links with nontrivial congestion. The result is one of the most comprehensive pictures of router delay performance that we are aware of. As our analysis is based on empirical results, it is not reliant on assumptions on traffic statistics or router operations. Our second aim is to use the completeness of the data as a tool to investigate how packet delays occur inside the router. In other words, we aim to provide a physical model capable of explaining the observed delay and congestion. Working in the context of the popular store and forward router architecture, we are able to justify the commonly held assumption that the bottleneck of such an architecture is in the output buffers, and thereby validate the fluid output queue model relied on routinely in the field of active probing. We go further to define a refined model with an accuracy close to the limits of time stamping precision, which is robust to many details of the architecture under reasonable loads.
Packet delays and congestion are fundamentally linked, as the former occur precisely because periods of temporary resource starvation, or micro congestion episodes, are dealt with via buffering. Our third contribution is an investigation of the origins of such episodes, driven by the question, “What is the dominant mechanism responsible for delays?” We use a powerful methodology of virtual or “semi-” experiments, that exploits both the availability of the detailed packet data, and the fidelity of the router model. We identify, and evaluate the contributions of, three known canonical mechanisms: i) reduction in page link bandwidth from core to access; ii) multiplexing of multiple input streams; iii) burstiness of the input traffic stream(s).
2.4 MODULES:
• CLIENT
• SERVER
MODULE DESCRIPTION:
SERVER:
Server is main module in this project, server receive the data sent by client & calculate the congestion parameters for the client like delay, bandwidth, busy & status of client.
CLIENT:
Client sends the data to server & if client is free at server, data is successfully sent .Otherwise the data is in queue until previous data is send.
2.5 FEASIBILITY REPORT:
Preliminary investigation examine project feasibility, the likelihood the system will be useful to the organization. The main objective of the feasibility study is to test the Technical, Operational and Economical feasibility for adding new modules and debugging old running system. All system is feasible if they are unlimited resources and infinite time. There are aspects in the feasibility study portion of the preliminary investigation:
• Technical Feasibility
• Operational Feasibility
Economical Feasibility
2.5.1 TECHNICAL FEASIBILITY:
The technical issue usually raised during the feasibility stage of the investigation includes the following:
• Does the necessary technology exist to do what is suggested?
• Do the proposed equipments have the technical capacity to hold the data required to use the new system?
• Will the proposed system provide adequate response to inquiries, regardless of the number or location of users?
• Can the system be upgraded if developed?
• Are there technical guarantees of accuracy, reliability, ease of access and data security?
Earlier no system existed to cater to the needs of ‘Secure Infrastructure Implementation System’. The current system developed is technically feasible. It is a web based user interface for audit workflow at NIC-CSD. Thus it provides an easy access to the users. The database’s purpose is to create, establish and maintain a workflow among various entities in order to facilitate all concerned users in their various capacities or roles. Permission to the users would be granted based on the roles specified. Therefore, it provides the technical guarantee of accuracy, reliability and security. The software and hard requirements for the development of this project are not many and are already available in-house at NIC or are available as free as open source. The work for the project is done with the current equipment and existing software technology. Necessary bandwidth exists for providing a fast feedback to the users irrespective of the number of users using the system.
1. INTRODUCTION
1.1 Introduction to Project:
END-TO-END packet delay is one of the canonical metrics in Internet Protocol (IP) networks, and is important both from the network operator and application performance points of view. For example the quality of Voice Over IP is directly dependent on delay, and network providers may have Service Level Agreements (SLAs) specifying allowable values of delay statistics across the domains they control. An important component of end-to-end delay is that due to forwarding elements, the fundamental building block of which is the delay incurred when a packet passes through a single IP router.
The motivation for the present work is a detailed knowledge and understanding of such “through-router” delays. A thorough examination of delay leads inevitably to deeper questions about congestion, and router queueing dynamics in general. We provide a comprehensive examination of these issues from three points of view: the understanding of origins, measurement, and reporting, all grounded in a unique data set taken from a router in the access network of a Tier-1 provider.
Although there have been many studies examining delay statistics and congestion measured at the edges of the network, very few have been able to report with any degree of authority on what actually occurs at switching elements. In an analysis of single hop delay on an IP backbone network was presented. Only samples of the delays experienced by packets, on some links, were identified. I single hop delays were also ob-tained for a router. However since the router only had one input and one output link, which were of the same speed, the internal queueing was extremely limited. In this paper we work with a data set recording all IP packets traversing a Tier-1 access router over a 13 hour period. All input and output links were monitored, allowing a complete picture of congestion, and in particular router delays, to be obtained.
This paper is based on a synthesis of material first presented in two conference papers and based on the above data set. Section VI-A contains new results. In part because it is both costly and technically challenging to collect, this data set, although now a few years old, to the best of our knowledge remains unique. Consequently, the same is true of the kind of analyzes it enables as presented here. What we emphasize in this presentation are the methodologies and approaches which have generic value. However, we believe that the detail and depth of the data analysis also makes this study worthwhile from the data archival point of view. Our specific conclusions are strictly speaking limited to a single data set with low loss and delay. However, since Tier-1 networks tend to be under provisioned, we believe it remains representative of backbone access routers and their traffic today. This conjecture requires testing against more data sets.
The first aim of this paper is a simple one, to exploit this unique data set by reporting in detail on the magnitudes, and also the temporal structure, of delays on high capacity links with nontrivial congestion. The result is one of the most comprehensive pictures of router delay performance that we are aware of. As our analysis is based on empirical results, it is not reliant on assumptions on traffic statistics or router operations.
Our second aim is to use the completeness of the data as a tool to investigate how packet delays occur inside the router. In other words, we aim to provide a physical model capable of explaining the observed delay and congestion. Working in the context of the popular store and forward router architecture, we are able to justify the commonly held assumption that the bottleneck of such an architecture is in the output buffers, and thereby validate the fluid output queue model relied on routinely in the field of active probing. We go further to define a refined model with accuracy close to the limits of time stamping precision, which is robust to many details of the architecture under reasonable loads.
Packet delays and congestion are fundamentally linked, as the former occur precisely because periods of temporary resource starvation, or microcongestion episodes, are dealt with via buffering. Our third contribution is an investigation of the origins of such episodes, driven by the question, “What is the dominant mechanism responsible for delays?”. We use a powerful methodology of virtual or “semi-” experiments, that exploits both the availability of the detailed packet data, and the fidelity of the router model. We identify, and evaluate the contributions of, three known canonical mechanisms:
i. Reduction in page link bandwidth from core to access;
ii. Multiplexing of multiple input streams;
iii. Burstiness of the input traffic stream(s).
To our knowledge, such a taxonomy of page link congestion has not been used previously, and our findings for this specific data set are novel and sometimes surprising. Our broader contribution however is the methodology itself, including a set of metrics which can be used to examine the origins of congestion and hence delay.
The fourth part of the paper gives an innovative solution to a nontrivial problem: how the complexities of microcongestion and associated delay behavior can be measured and summarized in a meaningful way. We explain why our approach is superior to attempting to infer delay behavior simply from utilization, an approach which is in fact fatally flawed. In addition, we show how this can be done at low computational cost, enabling a compact description of congestion behavior to form part of standard router reporting. A key advantage is that a generically rich description is reported, without the need for any traffic assumptions.
2. SYSTEM ANALYSIS
2.1 INTRODUCTION:
Using a unique monitoring experiment, we capture all packets crossing a (lightly utilized) operational access router from a Tier-1 provider, and use them to provide a detailed examination of router congestion and packet delays. The complete capture enables not just statistics as seen from outside the router, but also an accurate physical router model to be identified. This enables a comprehensive examination of congestion and delay from three points of view: the understanding of origins, measurement, and reporting. Our study defines new methodologies and metrics. In particular, the traffic reporting enables a rich description of the diversity of micro congestion behavior, without model assumptions, and at achievable computational cost.
2.2 EXISTING SYSTEM:
END-TO-END packet delay is one of the canonical metrics in Internet Protocol (IP) networks, and is important both from the network operator and application performance points of view. For example the quality of Voice Over IP is directly dependent on delay, and network providers may have Service Level Agreements (SLAs) specifying allowable values of delay statistics across the domains they control. An important component of end-to-end delay is that due to forwarding elements, the fundamental building block of which is the delay incurred when a packet passes through a single IP router.
2.3PROPOSED SYSTEM:
The motivation for the present work is a detailed knowledge and understanding of such “through-router” delays. A thorough examination of delay leads inevitably to deeper questions about congestion, and router queueing dynamics in general. We provide a comprehensive examination of these issues from three points of view: the understanding of origins, measurement, and reporting, all grounded in a unique data set taken from a router in the access network of a Tier-1 provider.
The first aim of this paper is a simple one, to exploit this unique data set by reporting in detail on the magnitudes, and also the temporal structure, of delays on high capacity links with nontrivial congestion. The result is one of the most comprehensive pictures of router delay performance that we are aware of. As our analysis is based on empirical results, it is not reliant on assumptions on traffic statistics or router operations. Our second aim is to use the completeness of the data as a tool to investigate how packet delays occur inside the router. In other words, we aim to provide a physical model capable of explaining the observed delay and congestion. Working in the context of the popular store and forward router architecture, we are able to justify the commonly held assumption that the bottleneck of such an architecture is in the output buffers, and thereby validate the fluid output queue model relied on routinely in the field of active probing. We go further to define a refined model with an accuracy close to the limits of time stamping precision, which is robust to many details of the architecture under reasonable loads.
Packet delays and congestion are fundamentally linked, as the former occur precisely because periods of temporary resource starvation, or micro congestion episodes, are dealt with via buffering. Our third contribution is an investigation of the origins of such episodes, driven by the question, “What is the dominant mechanism responsible for delays?” We use a powerful methodology of virtual or “semi-” experiments, that exploits both the availability of the detailed packet data, and the fidelity of the router model. We identify, and evaluate the contributions of, three known canonical mechanisms: i) reduction in page link bandwidth from core to access; ii) multiplexing of multiple input streams; iii) burstiness of the input traffic stream(s).
2.4 MODULES:
• CLIENT
• SERVER
MODULE DESCRIPTION:
SERVER:
Server is main module in this project, server receive the data sent by client & calculate the congestion parameters for the client like delay, bandwidth, busy & status of client.
CLIENT:
Client sends the data to server & if client is free at server, data is successfully sent .Otherwise the data is in queue until previous data is send.
2.5 FEASIBILITY REPORT:
Preliminary investigation examine project feasibility, the likelihood the system will be useful to the organization. The main objective of the feasibility study is to test the Technical, Operational and Economical feasibility for adding new modules and debugging old running system. All system is feasible if they are unlimited resources and infinite time. There are aspects in the feasibility study portion of the preliminary investigation:
• Technical Feasibility
• Operational Feasibility
Economical Feasibility
2.5.1 TECHNICAL FEASIBILITY:
The technical issue usually raised during the feasibility stage of the investigation includes the following:
• Does the necessary technology exist to do what is suggested?
• Do the proposed equipments have the technical capacity to hold the data required to use the new system?
• Will the proposed system provide adequate response to inquiries, regardless of the number or location of users?
• Can the system be upgraded if developed?
• Are there technical guarantees of accuracy, reliability, ease of access and data security?
Earlier no system existed to cater to the needs of ‘Secure Infrastructure Implementation System’. The current system developed is technically feasible. It is a web based user interface for audit workflow at NIC-CSD. Thus it provides an easy access to the users. The database’s purpose is to create, establish and maintain a workflow among various entities in order to facilitate all concerned users in their various capacities or roles. Permission to the users would be granted based on the roles specified. Therefore, it provides the technical guarantee of accuracy, reliability and security. The software and hard requirements for the development of this project are not many and are already available in-house at NIC or are available as free as open source. The work for the project is done with the current equipment and existing software technology. Necessary bandwidth exists for providing a fast feedback to the users irrespective of the number of users using the system.
