Chameleon Chips (Download Full Report And Abstract)
#13
[attachment=9961]
CHAPTER 1
1.1 INTRODUCTION

Today's microprocessors sport a general-purpose design which has its own advantages and disadvantages.
 Advantage: One chip can run a range of programs. That's why you don't need separate computers for different jobs, such as crunching spreadsheets or editing digital photos
 Disadvantage: For any one application, much of the chip's circuitry isn't needed, and the presence of those "wasted" circuits slows things down.
Suppose, instead, that the chip's circuits could be tailored specifically for the problem at hand--say, computer-aided design--and then rewired, on the fly, when you loaded a tax-preparation program. One set of chips, little bigger than a credit card, could do almost anything, even changing into a wireless phone. The market for such versatile marvels would be huge, and would translate into lower costs for users. So computer scientists are hatching a novel concept that could increase number-crunching power--and trim costs as well. Call it the chameleon chip. Chameleon chips would be an extension of what can already be done with field-programmable gate arrays (FPGAS).
An FPGA is covered with a grid of wires. At each crossover, there's a switch that can be semi permanently opened or closed by sending it a special signal. Usually the chip must first be inserted in a little box that sends the
programming signals. But now, labs in Europe, Japan, and the U.S. are developing techniques to rewire FPGA-like chips anytime--and even software that can map out circuitry that's optimized for specific problems.
The chips still won't change colors. But they may well color the way we use computers in years to come. it is a fusion between custom integrated circuits and programmable logic.in the case when we are doing highly performance oriented tasks custom chips that do one or two things spectacularly rather than lot of things averagely is used. Now using field programmed chips we have chips that can be rewired in an instant. Thus the benefits of customization can be brought to the mass market.
A reconfigurable processor is a microprocessor with erasable hardware that can rewire itself dynamically. This allows the chip to adapt effectively to the programming tasks demanded by the particular software they are interfacing with at any given time. Ideally, the reconfigurable processor can transform itself from a video chip to a central processing unit (cpu) to a graphics chip, for example, all optimized to allow applications to run at the highest possible speed. The new chips can be called a “chip on demand." In practical terms, this ability can translate to immense flexibility in terms of device functions. For example, a single device could serve as both a camera and a tape recorder (among numerous other possibilities): you would simply download the desired software and the processor would reconfigure itself to optimize performance for that function.
Reconfigurable processors, competing in the market with traditional hard-wired chips and several types of programmable microprocessors. Programmable chips have been in existence for over ten years. Digital signal processors (DSPs), for example, are high-performance programmable chips used in cell phones, automobiles, and various types of music players. Another version, programmable logic chips are equipped with arrays of memory cells that can be programmed to perform hardware functions using software tools. These are more flexible than the specialized DSP chips but also slower and more expensive. Hard-wired chips are the oldest, cheapest, and fastest - but also the least flexible - of all the options.
CHAPTER 2
2.1 CHAMELEON CHIPS

Highly flexible processors that can be reconfigured remotely in the field, Chameleon's chips are designed to simplify communication system design while delivering increased price/performance numbers. The chameleon chip is a high bandwidth reconfigurable communications processor (RCP).it aims at changing a system's design from a remote location. This will mean more versatile handhelds. Processors operate at 24,000 16-bit million operations per second (MOPS), 3,000 16-bit million multiply-accumulates per second (MMACS), and provide 50 channels of CDMA2000 chip-rate processing. The 0.25-micron chip, the CS2112 is an example.
These new chips are able to rewire themselves on the fly to create the exact hardware needed to run a piece of software at the utmost speed. an example of such kind of a chip is a chameleon chip. This can also be called a “chip on demand” “Reconfigurable computing goes a step beyond programmable chips in the matter of flexibility. It is not only possible but relatively commonplace to "rewrite" the silicon so that it can perform new functions in a split second. Reconfigurable chips are simply the extreme end of programmability.”
The overall performance of the ACM can surpass the DSP because the ACM only constructs the actual hardware needed to execute the software, whereas DSPs and microprocessors force the software to fit its given architecture.
One reason that this type of versatility is not possible today is that handheld gadgets are typically built around highly optimized specialty chips that do one thing really well. These chips are fast and relatively cheap, but their circuits are literally written in stone -- or at least in silicon. A multipurpose gadget would have to have many specialized chips -- a costly and clumsy solution. Alternately, you could use a general-purpose microprocessor, like the one in your PC, but that would be slow as well as expensive. For these reasons, chip designers are turning increasingly to reconfigurable hardware—integrated circuits where the architecture of the internal logic elements can be arranged and rearranged on the fly to fit particular applications.
Designers of multimedia systems face three significant challenges in today's ultra-competitive marketplace: Our products must do more, cost less, and be brought to the market quicker than ever. Though each of these goals is individually attainable, the hat trick is generally unachievable with traditional design and implementation techniques. Fortunately, some new techniques are emerging from the study of reconfigurable computing that make it possible to design systems that satisfy all three requirements simultaneously.
Although originally proposed in the late 1960s by a researcher at UCLA, reconfigurable computing is a relatively new field of study. The decades-long delay had mostly to do with a lack of acceptable reconfigurable hardware. Reprogrammable logic chips like field programmable gate arrays (FPGAs) have been around for many years, but these chips have only recently reached gate densities making them suitable for high-end applications. (The densest of the current FPGAs have approximately 100,000 reprogrammable logic gates.) With an anticipated doubling of gate densities every 18 months, the situation will only become more favorable from this point forward.
The primary product is ground station equipment for satellite communications. This application involves high-rate communications, signal processing, and a variety of network protocols and data formats.
2.2 ADVANTAGES AND APPLICATIONS
Its applications are in,
 data-intensive Internet
 DSP
 wireless basestations
 voice compression
 software-defined radio
 high-performance embedded telecom and datacom applications
 xDSL concentrators
 fixed wireless local loop
 multichannel voice compression
 multiprotocol packet and cell processing protocols
Its advantages are
 can create customized communications signal processors
 increased performance and channel count
 can more quickly adapt to new requirements and standards lower development costs and reduce risk.
CHAPTER 3
3.1 FPGA
One of the most promising approaches in the realm of reconfigurable architecture is a technology called "field-programmable gate arrays." The strategy is to build uniform arrays of thousands of logic elements, each of which can take on the personality of different, fundamental components of digital circuitry; the switches and wires can be reprogrammed to operate in any desired pattern, effectively rewiring a chip's circuitry on demand. A designer can download a new wiring pattern and store it in the chip's memory, where it can be easily accessed when needed.
Not so hard after all Reconfigurable hardware first became practical with the introduction a few years ago of a device called a “field-programmable gate array” (FPGA) by Xilinx, an electronics company that is now based in San Jose, California. An FPGA is a chip consisting of a large number of “logic cells”. These cells, in turn, are sets of transistors wired together to perform simple logical operations.
3.1.1 Evolving FPGAs
FPGAs are arrays of logic blocks that are strung together through software commands to implement higher-order logic functions. Logic blocks are similar to switches with multiple inputs and a single output, and are used in digital circuits to perform binary operations. Unlike with other integrated circuits, developers can alter both the logic functions performed within the blocks and the connections between the blocks of FPGAs by sending signals that have been programmed in software to the chip. FPGA blocks can perform the same high-speed hardware functions as fixed-function ASICs, and—to distinguish them from ASICs—they can be rewired and reprogrammed at any time from a remote location through software. Although it took several seconds or more to change connections in the earliest FPGAs, FPGAs today can be configured in milliseconds.
Field-programmable gate arrays have historically been applied as what is called glue logic in embedded systems, connecting devices with dissimilar bus architectures. They have often been used to page link digital signal processors—cpus used for digital signal processing—to general-purpose cpus.
The growth in FPGA technology has lifted the arrays beyond the simple role of providing glue logic. With their current capabilities, they clearly now can be classed as system-level components just like cpus and DSPs. The largest of the FPGA devices made by the company with which one of the authors of this article is affiliated, for example, has more than 150 billion transistors, seven times more than a Pentium-class microprocessor. Given today's time-to-market pressures, it is increasingly critical that all system-level components be easy to integrate, especially since the phase involving the integration of multiple technologies has become the most time-consuming part of a product's development cycle.
To Integrating Hardware and Software systems designers producing mixed cpu and FPGA designs can take advantage of deterministic real-time operating systems (RTOSs). Deterministic software is suited for controlling hardware. As such, it can be used to efficiently manage the content of system data and the flow of such data from a cpu to an FPGA. FPGA developers can work with RTOS suppliers to facilitate the design and deployment of systems using combinations of the two technologies. FPGAs operating in conjunction with embedded design tools provide an ideal platform for developing high-performance reconfigurable computing solutions for medical instrument applications. The platform supports the design, development, and testing of embedded systems based on the C language.
Integration of FPGA technology into systems using a deterministic RTOS can be streamlined by means of an enhanced application programming interface (API). The blending of hardware, firmware, application software, and an RTOS into a platform-based approach removes many of the development barriers that still limit the functionality of embedded applications. Development, profiling, and analysis tools are available that can be used to analyze computational hot spots in code and to perform low-level timing analysis in multitasking environments.
One way developers can use these analytical tools is to determine when to design a function in hardware or software. Profiling enables them to quickly identify functionality that is frequently used or computationally intensive. Such functions may be prime candidates for moving from software to FPGA hardware. An integrated suite of run-time analysis tools with a run-time error checker and visual interactive profiler can help developers create higher-quality, higher-performance code in little time.
An FPGA consists of an array of configurable logic blocks that implement the logical functions. In FPGA's, the logic functions performed within the logic blocks, and sending signals to the chip can alter the connections between the blocks. These blocks are similar in structure to the gate arrays used in some ASIC's, but whereas standard gate arrays are configured and fixed during manufacture, the configurable logic blocks in new FPGA's can be rewired and reprogrammed repeatedly in around a microsecond. One advantages of FPGA is that it needs small time to market Flexibility and Upgrade advantages Cheap to make .We can configure an FPGA using Very High Density Language [VHDL] Handel C Java .FPGA’s are used presently in Encryption Image Processing Mobile Communications .FPGA’s can be used in 4G mobile communication
The advantages of FPGAs are that Field programmable gate arrays offer companies the possibility of develloping a chip very quickly, since a chip can be configured by software. A chip can also be reconfigured, either during execution time, or as part of an upgrade to allow new applications, simply by loading new configuration into the chip. The advantages can be seen in terms of cost, speed and power consumption. The added functionality of multi-parallelism allows one FPGA to replace multiple ASIC’s.
Reply

Important Note..!

If you are not satisfied with above reply ,..Please

ASK HERE

So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Tagged Pages: chameleon chips pdf, chameleon chip pdf,
Popular Searches: chameleon breeders, designer wallets, chameleon chips abstract, chameleon processor pdf, based on ieee format show the abstract of chameleon chips, full foprm of d g p s, doc of multiprocessor systems on chips,

[-]
Quick Reply
Message
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Messages In This Thread
RE: Chameleon Chips (Download Full Report And Abstract) - by seminar class - 10-03-2011, 03:36 PM

Possibly Related Threads...
Thread Author Replies Views Last Post
  computer networks full report seminar topics 8 43,926 06-10-2018, 12:35 PM
Last Post: jntuworldforum
  OBJECT TRACKING AND DETECTION full report project topics 9 31,815 06-10-2018, 12:20 PM
Last Post: jntuworldforum
  imouse full report computer science technology 3 25,973 17-06-2016, 12:16 PM
Last Post: ashwiniashok
  Implementation of RSA Algorithm Using Client-Server full report seminar topics 6 27,688 10-05-2016, 12:21 PM
Last Post: dhanabhagya
  Optical Computer Full Seminar Report Download computer science crazy 46 68,065 29-04-2016, 09:16 AM
Last Post: dhanabhagya
  ethical hacking full report computer science technology 41 76,196 18-03-2016, 04:51 PM
Last Post: seminar report asees
  broadband mobile full report project topics 7 24,491 27-02-2016, 12:32 PM
Last Post: Prupleannuani
  steganography full report project report tiger 15 42,626 11-02-2016, 02:02 PM
Last Post: seminar report asees
  Digital Signature Full Seminar Report Download computer science crazy 20 45,375 16-09-2015, 02:51 PM
Last Post: seminar report asees
  Steganography In Images (Download Seminar Report) Computer Science Clay 16 26,376 08-06-2015, 03:26 PM
Last Post: seminar report asees

Forum Jump: