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ARM partners will be able to differentiate and optimize ARM11 cores for power and performance, exploiting the characteristics of their own process technologies. The new microarchitecture is targeted at next-generation high-end portable and wireless applications, consumer, networking, and automotive applications. There are many features that will also make ARM11 processors highly suited to high-end embedded realtimeapplications, such as future networking and in-home entertainment products now require
History of RISC computers
First commercial RISC in 1985 by Acorn
First low-cost RISC-powered PC in 1987 by Acorn
ARM (joint venture of Acorn+Apple+VLSI) was established in Nov 1990
StrongARM (joint venture of ARM+Digital) established in 1998
Intel bought the license for StrongARM from ARM
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ECG applicattion by bluetootrh data transmission
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Superb Presentation there.
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please ask in
http://seminarsprojects.in/thread.php?fid=29 for different topic other than ARM PROCESSOR, because this page only dedicated to ARM PROCESSOR.
.....please co operated with us.....
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ARM PROCESSORS
By,
NIMMI JAMES
S7 EC-A
ROLL NO:46
Brief history of ARM
Founded in 1990.
ARM -Advanced Risc Machines
32bit RISC processor from ARM Holdings.
ARM Holding is a joint venture between Acron computers, Apple computers and VLSI Technology
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PRESENTED BY:
MAHIN BASHA SYED
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RISC CONCEPTS WITH ARM
cisc evolution
THE ART OF PROCESSOR DESIGN IS TO DEFINE AN INSTRN SET THAT SUPPORTS FUNCTIONS
WHAT SORT INSTRN SET MAKES A GOOD COMPILER TARGET
WHY DOES COMPILER NEEDED???
THE SEMANTIC GAP BETWEEN A HIGH LEVEL LANGUAGE CONSTRUCT AND A MACHINE INSTRN IS BRIDGED BY COMPILER
COMPILER TARGET ??
THE AIM OF PROCESSOR DESIGN SHOULD DEFINE HIS OR HER INSRTN SET TO BE GOOD COMPILER TARGET
THIS LEDS TO THE CISC DEVELOPMEENT
MINI COMPUTERS DEVELOPED WHICH HAS MAIN MEMORY CONTROLLED BY MICRO CODE ROMS WHICH ARE FASTER THAN MAIN MEMORY
MINI COMPUTERS USES CISC
IN 1970, MICRO PROCESSORS DEVEL0PED FASTLY IN SEMICONDUCTOR INDUSTRY BUT MICRO CODE ROM IS NEEDED FOR ALL COMPLEX ROUTINES
CISC IS NOTHING BUT MP WITH MINICOMPUTER INSTRN SET
WHAT IS CISC ??
CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory. Since the earliest machines were programmed in assembly language and memory was slow and expensive,
WHAT IS RISC ??
RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures.
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History
Started in 1983 as a project for Acorn Computers Ltd
The original processor was an advanced MOS Technology 6502 (an 8-bit microprocessor designed by MOS Technology in 1975 considered the least expensive at the time
History
ARM1
Completed in 1985
ARM2
First “real” production systems
32-bit data bus
26-bit address space
16 32-bit registers (one of these served as the program counter
Only 30000 transistors
Did not have microcode
No cache
Performed better than the 286
4 million instructions per second
ARM3
Consisted of a 4kb cache
History
In the late 1980’s Apple Computer started working with Acorn and the company became Advanced RISC Machines
ARM6
Apple used the ARM6-based ARM 610 as the basis for the Apple Newton PDA
History
ARM6
35000 transistors
ARM7TDMI
Most successful implementation
DEC licensed this design and produced the StrongARM
StrongARM
233MHz
Drew only 1 watt of power
Took over by Intel in a lawsuit and since then Intel developed the XScale (found in products such as the Dell Axim)
History
The following companies all licensed the basic ARM design for various uses
Motorola
IBM
Texas Instruments
Nintendo
Philips
VLSI
Sharp
Samsung
Uses
Hard-drives
Mobile phones
Routers
Calculators
Toys
Accounts for over 75% of embedded CPU’s
Introduction to ARM
RISC design
Most of the instructions can be executed in one clock cycle
Low power consumption (no heat sinks or fans required)
Easy to program
Allows for pipelining
Thumb
NEON
Jazelle
Registers
16 registers (R0 to R15
R13 – used for stack operations
R14 – used for the page link register (used for storing return addresses in the construction of sub routines
R15 – the program counter
ARM Assembly
MODE 28 :REM If you have an A310 etc. try MODE 15
DIM mcode% 1024 :REM This line reserves 1024 bytes of memory REM which start at position mcode%
P%=mcode% :REM P% is a reserved variable which acts as a pointer
REM while assembling the code
REM we wish the code to start at mcode%
[ :REM Note this is the square bracket (to the right
REM of the P key).
REM This tells BASIC to enter the ARM assembler, all REM commands from now are in ARM assembler.
ADD R0,R1,R2 :REM Our ARM code instruction MOV PC,R14
:REM This instruction copies the value in R14 (link
REM register contains the return address to return to
REM BASIC) into the program counter hence
REM jumping to the next BASIC line after running
REM our ARM code program.
] :REM Leave the ARM code assembler and return to BASIC.
ARM Assembly
INPUT"Enter an integer value "B%
INPUT"Enter another integer value"C%
REM These two lines therefore will give their values to R1 and R2.
A%=USR(mcode%) :REM This line runs the ARM code starting
REM at mcode%
REM (our assembled code) returning the
REM value in R0 to BASIC.
PRINT"The answer is ";A% :REM Print the answer. END
ARM Assembly
MODE28
DIM mcode% 1024
P%=mcode%
[
ADD R0,R1,R2
MOV PC,R14
]
INPUT"Enter an integer value "B%
INPUT"Enter another integer value"C%
A%=USR(mcode%)
PRINT"The answer is ";A%
END
Listing
00008FD8
00008FD8 E0810002 ADD R0,R1,R2
00008FDC 1A0F00E MOV PC,R14
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04-04-2011, 12:01 AM
please send me a report of arm
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please mail me full report on arm processor my mail is ncsbalaji[at]gmail.com
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