28-02-2011, 02:15 PM
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Image Edge Detection based on FPGA
Objective
Sobel operator edge detection.
FPGA:
Real-time requirement.
Accurately locate the image edges.
Overview
Implementing parallel construction of sobel edge detection enhancement algorithm.
The algorithm is designed with a FPGA chip and it can process 1024×1024×8 Gray Scale Image successfully.
Proposed System
VHDL code for Sobel edge enhancement algorithm.
Implementing in the Xilinx Spartan3 FPGA by ISE9.2i.
Introduction
Sobel edge detection :
Quickly get the result of one pixel in only one clock periods.
Find the gradient vector of the image.
It only consider two orientation convolution kernels.
Sobel edge detection:
Convolution kernels
Architecture
3*3 pixel generation
Generate 3*3 pixels in the image.
The image data input according to the clock signal,
so P1, P2,•••,P9 is the 3 × 3 image data template.
Sobel enhancement:
Compared the two orientations of convolutions kernels.
To get maximum gradient values of the image.
Edge control
Controls the 3*3 pixels generation and sobel enhancement.
It gives the current edge pixel locations.
Binary segmentation
Applying different Threshold values to outputs of edge control and sobel enhancement.
By threshold values get the final results of the edges of the image.