Hi am Anurag from iiit nr i would like to get details on vhdl implementation of lossless data compression & decompression code.
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vhdl implementation of lossless data compression & decompression code
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Hi am Anurag from iiit nr i would like to get details on vhdl implementation of lossless data compression & decompression code.
10-04-2017, 03:31 PM
In computing and information theory, data compression or source coding is the process of encoding information using fewer bits than an uncoded representation that it would use, by using specific encoding schemes. As with any communication, compressed data communication only works when both the sender and the receiver of the information understand the coding scheme. For example, this text makes sense only if the recipient understands that it is intended to be interpreted as characters representing the English language. Similarly, compressed data can only be understood if the receiver knows the decoding method. Compression is useful because it helps reduce the consumption of expensive resources, such as hard disk space or transmission bandwidth. On the negative side, the compressed data must be decompressed to be used, and this additional processing may be detrimental to some applications. For example, a video compression scheme may require expensive hardware to decompress the video fast enough to be decompressed (the option of decompressing the entire video before viewing it can be cumbersome and requires uncompressed storage space video). The design of data compression schemes therefore involves compromises between several factors, including the degree of compression, the amount of distortion introduced (if a lossy compression scheme is used), and the computational resources required to compress and decompress data.
While investigating the JPEG-LS algorithm on the World Wide Web, we found that a RIT graduate student, Michael Piorun, had already completed a JPEG-LS compression algorithm in VHDL for simulation as his thesis project. We have been able to obtain your thesis documentation, as well as all your work code. Since this code was written in 1999, and the synthesis tools for VHDL have changed in the five years since the completion of their project, many libraries and specific lines of code need to be changed and updated for current compilers. Once the VHDL was updated to current standards, a "makefile" provided by Annapolis Microsystems turned this project into the binary file needed to program the FPGA. It is at this point that much of the optimization is done to the design, the components that are not used are eliminated by the "makefile", and the program is condensed to a functional minimum. Our achievements during this project resulted in the determination that the Wildbird FPGA Firebird card is functional. This was done with the help of two sample programs. One determined that the main functions of the card were accessible (active matrix display and LEDS). The second program proved that the card's DMA functions worked correctly. The code was fulfilled and executed through the "makefile", where we felt that the important components were optimized. This was due to time constraints that prevented us from being able to implement modules such as memory interface and registry control. We also feel that there is a problem with the numeric system that Michael Piorun used because it is not the standard VHDL syntax.
While investigating the JPEG-LS algorithm on the World Wide Web, we found that a RIT graduate student, Michael Piorun, had already completed a JPEG-LS compression algorithm in VHDL for simulation as his thesis project. We have been able to obtain your thesis documentation, as well as all your work code. Since this code was written in 1999, and the synthesis tools for VHDL have changed in the five years since the completion of their project, many libraries and specific lines of code need to be changed and updated for current compilers. Once the VHDL was updated to current standards, a "makefile" provided by Annapolis Microsystems turned this project into the binary file needed to program the FPGA. It is at this point that much of the optimization is done to the design, the components that are not used are eliminated by the "makefile", and the program is condensed to a functional minimum. Our achievements during this project resulted in the determination that the Wildbird FPGA Firebird card is functional. This was done with the help of two sample programs. One determined that the main functions of the card were accessible (active matrix display and LEDS). The second program proved that the card's DMA functions worked correctly. The code was fulfilled and executed through the "makefile", where we felt that the important components were optimized. This was due to time constraints that prevented us from being able to implement modules such as memory interface and registry control. We also feel that there is a problem with the numeric system that Michael Piorun used because it is not the standard VHDL syntax.
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