Verilog Examples
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Verilog Examples


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Combinational Logic Structures

Continuous assignment statements are a very useful and compact language structure for specifying small
collections of gates. The following examples are intended to go beyond those provided in the text and
illustrate concepts that sometimes are found to be difficult.

Multiple-input Multiplexors

Multiplexors requiring more than two inputs can also be specified using procedural code, usually by using a
case or casex satement. The 8:1 multiplexor described in the example above can be specified procedurally
as follows.

Demultiplexor

A demultiplexor is the converse of a multiplexor. It takes one input and directs it to any of N inputs, based
on the number specified in the select lines. It could be captured either using procedural code or continuous
assignment. Both of the following statements describe identical behavior.

Decoder

A deocoder takes a narrow input and decodes it to a wider range of bits. Typically they are part of the
control logic. The commands to individual units are encoded so as to save wires and then a decoder is used
to determine the individual control bits.
The previous example included a non-priority 3:8 decoder. Three inputs were decoded to choose one of
eight control lines. It is non-priority as none of the input combinations has priority over any of the others.
This decoder implemented the following truth table.

Encoder

An encoder takes a multi-bit input and encodes it as a different, often shorter, bit stream. As such it is
implementing a truth table with fewer outputs than inputs and it is coded much the same way as a decoder.
An example is a gray-code encoder. In a gray code encoder the position of the ‘1’ bit in a N-bit data stream
is captured with a code in which only one bit changes between adjacent values in the sequence. The
following truth table uses a gray code in the output.
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