SUPERSCALAR ARCHITECTURE ppt.
#1



[attachment=8511]

Definition and Characteristics
Superscalar processing is the ability to initiate multiple instructions during the same clock cycle.
A typical Superscalar processor fetches and decodes the incoming instruction stream several instructions at a time.
Superscalar architecture exploit the potential of ILP(Instruction Level Parallelism).

Uninterrupted stream of instructions
The outcomes of conditional branch instructions are usually predicted in advance to ensure uninterrupted stream of instructions
Instructions are initiated for execution in parallel based on the availability of operand data, rather than their original program sequence. This is referred to as dynamic instruction scheduling.
Upon completion instruction results are resequenced in the original order.

CONCLUSION

It thereby allows faster CPU throughput than would otherwise be possible at the same clock rate.
All general-purpose CPUs developed since about 1998 are superscalar.

The major problem of executing multiple instructions in a scalar program is the handling of data dependencies. If data dependencies are not effectively handled, it is difficult to achieve an execution rate of more than one instruction per clock cycle.








Reply

Important Note..!

If you are not satisfied with above reply ,..Please

ASK HERE

So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Popular Searches: ppt on sms architecture, working of responsive architecture ppt, 3d tv architecture ppt, hiperlan architecture ppt, pvm architecture ppt, temple architecture in ppt format, 8089 architecture ppt,

[-]
Quick Reply
Message
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Possibly Related Threads...
Thread Author Replies Views Last Post
  FLEXIBLE HARDWARE ARCHITECTURE OF HIERARCHICAL K-MEANS CLUSTERING FOR LARGE CLUSTER N seminar class 3 2,166 04-07-2011, 01:15 PM
Last Post: lokeshvaddla
  Implementation of a Multi-Processing Architecture Approach on FPGA seminar-database 0 1,113 20-05-2011, 08:12 AM
Last Post: seminar-database
  Floating-Point FPGA: Architecture and Modeling seminar-database 0 1,196 19-05-2011, 03:36 PM
Last Post: seminar-database
  The Web Sensor Gateway Architecture for ZIGBEE seminar class 1 1,894 03-05-2011, 12:55 PM
Last Post: seminar class
  DIRECT DIGITAL RF MODULATOR: A MULTI-FUNCTION ARCHITECTURE FOR A SYSTEM-INDEPENDENT R science projects buddy 0 1,599 18-12-2010, 10:04 PM
Last Post: science projects buddy
  The Autonomic Network Architecture (ANA) projectsofme 0 1,100 26-11-2010, 10:51 AM
Last Post: projectsofme
  Blue Gene Architecture project report helper 0 1,013 12-10-2010, 09:41 AM
Last Post: project report helper
  MAGNETIC RESONANCE IMAGING SIMULATION ON A GRID COMPUTING ARCHITECTURE full report computer science topics 0 1,700 16-06-2010, 09:17 PM
Last Post: computer science topics
  The Pure IP Moby Dick 4G Architecture seminar presentation 0 1,091 21-05-2010, 11:55 PM
Last Post: seminar presentation
  Mobile Pentium 4 Architecture Supporting Hyper-ThreadingTechnology presentation seminar presentation 0 1,137 12-05-2010, 09:19 PM
Last Post: seminar presentation

Forum Jump: