This article is presented by:Jaroslav Lepka
Petr Stekl

3-Phase AC Induction Motor
Vector Control Using a
56F80x, 56F8100 or
56F8300 Device

Introduction
This application note describes the design of a 3-phase AC Induction Motor (ACIM) vector control drive with position encoder coupled to the motor shaft. It is based on Freescale’s 56F80x and 56F8300 dedicated motor control devices. The software design takes advantage of Processor ExpertTM (PE) software. AC induction motors, which contain a cage, are very popular in variable-speed drives. They are simple, rugged, inexpensive and available at all power ratings. Progress in the field of power electronics and microelectronics enables the application of induction motors for high-performance drives, where traditionally only DC motors were applied. Thanks to sophisticated control methods, AC induction drives offer the same control capabilities as high performance four-quadrant DC drives. This drive application allows vector control of the AC induction motor running in a closed-speed loop with the speed / position sensor coupled to the shaft. The application serves as an example of AC induction vector control drive design using a Freescale hybrid controller with PE support. It also illustrates the use of dedicated motor control libraries that are included in PE. This application note includes a description of Freescale hybrid controller features, basic AC induction motor theory, the system design concept, hardware implementation and software design, including the PC master software visualization tool.
Advantages and Features of Freescale’s Hybrid Controller
The Freescale 56F80x (56800 core) and 56F8300 (56800E core) families are well-suited for digital motor
control, combining the DSP’s calculation capability with an MCU’s controller features on a single chip. These
hybrid controllers offer many dedicated peripherals, including a Pulse Width Modulation (PWM) unit, an
Analog-to-Digital Converter (ADC), timers, communication peripherals (SCI, SPI, CAN), on-board Flash and
RAM. Generally, all the family members are appropriate for use in AC induction motor control.
The following sections use a specific device to describe the family’s features.
56F805, 56800 Core Family
The 56F805 provides the following peripheral blocks:
• Two Pulse Width Modulator units (PWMA and PWMB), each with six PWM outputs, three Current
Sense inputs, and four Fault inputs, fault-tolerant design with dead time insertion; supports both
center-aligned and edge-aligned modes
• 12-bit Analog-to-Digital Converters (ADCs), supporting two simultaneous conversions with dual
4-pin multiplexed inputs; ADC can be synchronized by PWM modules
• Two Quadrature Decoders (Quad Dec0 and Quad Dec1), each with four inputs, or two additional Quad
Timers, A & B
• Two dedicated general purpose Quad Timers, totalling six pins: Timer C, with two pins and Timer D,
with four pins
• CAN 2.0 B-compatible module with 2-pin ports used to transmit and receive
• Two Serial Communication Interfaces (SCI0 and SCI1), each with two pins, or four additional GPIO
lines
• Serial Peripheral Interface (SPI), with a configurable 4-pin port (or four additional GPIO lines)
• Computer Operating Properly (COP) / Watchdog timer
• Two dedicated external interrupt pins
• 14 dedicated General Purpose I/O (GPIO) pins, 18 multiplexed GPIO pins
• External reset pin for hardware reset
• JTAG / On-Chip Emulation (OnCE) for unobtrusive, processor speed-independent debugging
• Software-programmable, Phase Lock Loop-based frequency synthesizer for the hybrid controller core
clock
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