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16-10-2017, 07:16 AM

Hi, iam shanti.I would like to get notes on kohavi algorithm.My friend said pdf notes on kohavi algorithm in digital system design will be available here

jaseela123d · 19-10-2017, 12:29 PM

The concepts of fault modeling, diagnostics, testing and fault tolerance of digital circuits have become very important research topics for logic designers during the last decade. With developments in VLSI technology, there is a dramatic increase in the number of components on a single chip. As a result of the increase in chip density, the likelihood of failure also increased. So, the logic designer should always consider two points. One is to confirm if the digital circuit is working properly and is fault-free. This involves the process of diagnosing and testing failures. The second is that the correct operation of the circuit must be guaranteed even in the presence of faults. This is the process of fault tolerance. There are different types of faults in digital circuits. A fault in a circuit is defined as the physical defect of one or more circuit components. Faults can be permanent or temporary. Permanent faults are caused by breakage or wear of components. Permanent faults are also called hard and solid faults. Temporal failures are also known as soft failures are those failures that occur only certain time intervals. These faults may be transient or intermittent. A transient fault is usually caused by some externally induced signal disturbance, such as fluctuations in the power supply. An intermittent fault is one that occurs frequently when a component is in the process of developing a permanent fault. Depending on the effect of faults, they are also classified as Logic or Parametric. A logic fault changes the Boolean function performed by the digital circuit, whereas a parametric fault alters the magnitude of the circuit parameter causing a change in speed, current or voltage. A very important parametric fault is the delay fault, which is caused by slow logic gates. This type of fault leads to critical hazards or races. The extent of a fault specifies whether the effect of the fault is localized or distributed. A local fault affects only a single variable, while a distributed fault affects more than one. A logical fault, for example, is a local fault, whereas the clock malfunction is a distributed fault. Fault modeling: Logical faults represent the effect of physical faults on the behavior of the modeled system.

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