Modeling and Simulation of Single-Event
Effects in Digital Devices and ICs
The modeling and simulation of single-event effects (SEE) in digital devices
and integrated circuits is discussed in this article.The physical modeling of ultra-scaled devices (in the deca-nanometer range) and new device architectures
(Silicon-on-insulator, multiple-gate, nanowire MOSFETs are given special emfhasis. The drift-diffusion, hydrodynamic, Monte-Carlo and the other transport models in the device-level simulation is first described. The effects such as the quantum effects, tunneling current, ballistic operation affecting the ultra-short MOSFETs is also discussed.Testing results using the fully-depleted SOI and multiple-gate devices is also discussed.
The scaling of the MOS transistor is behind the phenomenal success of CMOS technology and through that the progress of the information technology. more powerful products for digital electronics has been produced by the smaller, denser, faster and cheaper fabrication of the MOSFET.

Single-Event Effects on
Microelectronic Devices
The mechanisms leading to these effects in the devices can be described as the result of three actions taking place;
-the charge deposition by the energetic particle striking the sensitive region
When an energetic particle strikes the device, there occurs a charge deposition due to either direct ionization by the interaction with the material or indirect ionization, by secondary particles.

-the transport of the released charge into the device
the released carriers are quickly transported and collected by elementary structures like pn junctions when a charge column is created in the
semiconductor by an ionizing particle.
-charge collection in the sensitive region of the device
a parasitic current transient is induced by the charges transported in the device. reversely-biased - junctions are the ones mostly sensitive to the ionizing particle strikes as the strong electric field present in such junctions act as ideal places for collecting charges.

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