i need slides for this topic pls send 10 to 15 slides
describing its functioning , advantage, disadvantage etc

molelectronics

ABSTRACT
As a scientific pursuit, the search for a viable successor to silicon computer technology has garnered considerable curiosity in the last decade. The latest idea, and one of the most intriguing, is known as molecular computers, or moletronics, in which single molecules serve as switches, "quantum wires" a few atoms thick serve as wiring, and the hardware is synthesized chemically from the bottom up.

The central thesis of moletronics is that almost any chemically stable structure that is not specifically disallowed by the laws of physics can in fact be built. The possibility of building things atom by atom was first introduced by Richard Feynman in 1959.

An "assembler", which is little more than a submicroscopic robotic arm can be built and be controlled. We can use it to secure and position compounds in order to direct the precise location at which chemical reactions occur. This general approach allows the construction of large, atomically precise objects by initiating a sequence of controlled chemical reactions. In order for this to function as we wish, each assembler requires a process for receiving and executing the instruction set that will dictate its actions. In time, molecular machines might even have onboard, high speed RAM and slower but more permanent storage. They would have communications capability and power supply. . Moletronics is expected to touch almost every aspect of our lives, right down to the water we drink and the air we breathe. Experimental work has already resulted in the production of molecular tweezers, a carbon nanotube transistor, and logic gates. Theoretical work is progressing as well. James M. Tour of RiceUniversity is working on the construction of a molecular computer. Researchers at Zyvex have proposed an Exponential Assembly Process that might improve the creation of assemblers and products, before they are even simulated in the lab. We have even seen researchers create an artificial muscle using nanotubes, which may have medical applications in the nearer term.

Teramac computer has the capacity to perform 1012 operations in one seconds but it has 220,000 hardware defects and still has performed some tasks 100 times faster than single-processor .The defect-tolerant computer architecture and its implications for moletronics is the latest in this technology. So the very fact that this machine worked suggested that we ought to take some time and learn about it.

Such a 'defect-tolerant' architecture through moletronics could bridge the gap between the current generation of microchips and the next generation of molecular-scale computers.

The Architecture of a Moletronics Computer
Introduction
Recently, there have been some significant advances in the fabrication and demonstration of individual molecular electronic wires and diode switches. Some novel designs for several such simple molecular electronic digital logic circuits: a complete set of three fundamental logic gates: (AND, OR, and XOR gates), plus and adder function built up from the gates via the well-known combinational logic, was demonstrated. This means in coming future, this technology could be a replacement for VLSI. However, currently, this technology is only available under lab condition. How to mass product moletronic chips is still a big problem.
Currently, integrated circuits by etching silicon wafers using beam of light. It's the VLSI lithography-based technology makes mass production of Pentium III processor possible. But as the size of logic block goes to nano-scale, this technology no long available. As wavelength get too short, they tend to become X-rays and can damage the micro structure of molecules. On the other hand, the mask of lithography of PentiumIII is so complex, and the shape and the dimension of its logic block varies so much. Looking at currently available integrated circuits, the transistor density of memory chip are much higher than processor chip, the reason is that the cell of memory is much more simple than circuit of processor. Because, except the decoding logic, most of the memory bit cell is the same. Could we find a way to fabricate complex logic circuit as Pentium processor using million of same logic units? The PLD(Programmable Logic Devices) is the answer. The paper is organized as following: section II presents some basic of moletronic gate circuit. section III uses PLD technology to build more complex blocks. section IV shows the nanotube can be used for interconnection wires.

Moletronic circuit--QCA basics
We discuss an approach to computing with quantum dots, Quantum-dot Cellular Automata (QCA), which is based on encoding binary information in the charge configuration of quantum-dot cells. The interaction between cells is Coulombic, and provides the necessary computing power. No current flows between cells and no power or information is delivered to individual internal cells. Local interconnections between cells are provided by the physics of cell-cell interaction. The links below describes the QCA cell and the process of building up useful computational elements from it. The discussion is mostly qualitative and based on the intuitively clear behavior of electrons in the cell.

Fundamental Aspects of QCA

A QCA cell consists of 4 quantum dots positioned at the vertices of a square and contains 2 extra electrons. The configuration of these electrons is used to encode binary information. The 2 electrons sitting on diagonal sites of the square from left to right and right to left are used to represent the binary "1" and "0" states respectively. For an isolated cell these 2 states will have the same energy. However for an array of cells, the state of each cell is determined by its interaction with neighboring cells through the Coulomb interaction.

If the barriers between cells are sufficiently high, the electrons will be well localized on individual dots. The Coulomb repulsion between the electrons will tend to make them occupy antipodal sites in the square a shown in Fig. 2. For an isolated cell there are two energetically equivalent arrangements of the extra electrons which we denote as a cell polarization P = +1 and P = -1. The term "cell polarization" refers only to this arrangement of charge and does not imply a dipole moment for the cell. The cell polarization is used to encode binary information - P = +1 represents a binary 1 and P = -1 represents a binary 0.

The two polarization states of the cell will not be energetically equivalent if other cells are nearby. Consider two cells close to one another as shown in the inset of Fig. 3. The figure inset illustrates the case when cell 2 has a polarization of +1. It is clear that in that case the ground-state configuration of cell 1 is also a +1 polarization. Similarly if cell 2 is in the P = -1 state, the ground state of cell 1 will match it. The figure shows the nonlinear response of the cell-cell interaction.

A Majority Gate

Fig. 4 shows the fundamental QCA logical device, a three-input majority gate, from which more complex circuits can be built. The central cell, labeled the device cell, has three fixed inputs, labeled A, B, and C. The device cell has its lowest energy state if it assumes the polarization of the majority of the three input cells. The output can be connected to other wires from the output cell. The difference between input and outputs cells in this device, and in QCA arrays in general, is simply that inputs are fixed and outputs are free to change. The inputs to a particular device can come from previous calculations or be directly fed in from array edges. The schematic symbol used to represent such a gate is also shown in Fig. 4. It is possible to "reduce" a majority logic gate by fixing one of its three inputs in the 1 or 0 state. If the fixed input is in the 1 state, the OR function is performed on the other two inputs. If it is fixed in the 0 state, the AND function is performed on the other two inputs. In this way, a reduced majority logic gate can also serve as a programmable AND/OR gate. Combined with the inverter shown above, this AND/OR functionality ensures that QCA devices provide logical completeness

Programmable Logic Devices and Field Programmable Gate Array basics
The Programmable Logic Devices(PLD) are nothing new, they have been around for almost 20 years. Since PLD device exists, it makes the life of a lot of Electronic designer's life easy. It is well known that in order to design a digital system, besides microprocessors and peripheral ICs there are needed several other devices, such as lots of logic gates to glue these chips together. This circuits make our life and our printed boards very hard and complex. It exists a way to dramatically improve this way of design digital devices that, although it is not completely different from the others, brings the desired results more efficiently: in a shorter time and with fewer expenses. The way abovementioned is Programmable logic devices (PLD), they permit the customizing of one or more logic functions on a chip in contrast to the designer being restricted to defining a logic function with specific chips. The programmability aspect permits the logic designer to spend more time on the development and validation of high level functionality. The simplest Integrated circuit of the PLD is PAL/GAL. PAL(Programmable Array Device), which was invented at Monolithic Memories in 1978 PAL consists of an AND array followed by an OR array, either (or both) of which is programmable. Inputs are fed into the AND array, which performs the desired AND functions and generates product terms. The products terms are then fed into the OR array. In OR array, the output of various product terms are combined to produced the desired output. With PAL, we can implement any combinational logic circuit. How about the sequential logic circuits? There exists another kind of customized IC: Field Programmable Gate Array. See Fig. 7.

Unlike the traditional fully customised VLSI circuits, Field Programmable Gate Array(FPGAs) represent a technical breakthrough in the corresponding industry. Before they were introduced, an electronic designer had only a few options for implementing digital logic. These options included discrete logic devices (VLSI or SSI); programmable devices (PALs or PLDs); and Masked Programmed Gate Arrays(MPGA) or Cell-Based ASICs. A discrete device can be used to implement a small amount of logic. A programmable device is a general-purpose device capable of implementing the logic of tens or hundreds of discrete devices. It is programmed by users at their site using programming hardware. The size of a PLD is limited by the power consumption and time delay. In order to implement designs with thousands or tens of thousands of gates on a single IC, MPGA can be used. An MPGA consists of a base of pre-designed transistors with customised wiring for each design. The wiring is built during the manufacturing process, so each design requires custom masks for the wiring. The cost of mask-making is expensive and the turnarround time is long (typically four to six weeks). The availability of FPGAs offer the benefits of both PLD and MPGA. FPGAs can implement thousand of gates of logic in a single IC and it can be programmed by users at their site in a few seconds or less depending on the type device used. The risk is low and the development time is short. These advantages have made FPGAs very popular for prototype development, custom computing, digital signal processing, and logic emulation. From the architecture of PLD and FPGA, we could see repeated logic cell. Thus, density of this kind of chip increased very quickly. Just a few years ago, a high-density FPGA consisted of 50K gates and was used for glue logic. Today's FPGA are multi-million system gate devices at the heart of electronic systems in some of the fastest growing high-tech markets. There is a lot of computer around the world using FPGA processors.

interconnection: nanotube
Today, one way to pack transistors more densely on a chip is to make the already microscopic wires smaller and thinner. But the wires are approaching the thickness of a few hundred atoms. Once wires get down to only several atoms thick, says IBM researcher Phaedon Avouris, they blow up when you try to send electrical signals through them. Nanotubes don't. IBM and others are racing to use nanotubes to make the first carbon chips, perhaps the successor to silicon chips, though the program is only in the earliest stages. A carbon nanotube is a tubular form of carbon with a diameter as smaller as 1 nm. The length can be from a few nanometers to several microns. (1 micron is equal to 1,000 nanometers.) It is made of only carbo atoms. To understand the CNT's structure, it helps to imagine folding a two-dimensional graphene sheet. Depending on the dimensions of he sheet and how it is folded, several variations of nanotubes can arise. Also, just like the singel or the multilayer nature of graphene sheets, the resulting tubes may be a single- or a multiwall type. The tube's orientation is denoted by a roll-up vector(See Fig.8) $\tt {c}=n\tt {a}+m\tt {b}$. Along this vector, the graphene sheet is rolled into a tubular from. The $\tt {a}$and $\tt {b}$are vectors defining a unit cell in the planer graphene sheet. n and m are integers, and $\theta$is the angle. A variety of tubes-based on the orientations of the benzyne rings on the graphene tube-are possible. If the orientation is parallel to the tube axis, then the resulting "zigzag" tubes are semiconductors. When the orientation is perpendicular to the tube axis, the corresponding "arm chair" tubes are metallic. In between the two extremes, when (n-m)/3 is an integer, the nanotubes are semimetallic. The two key parameters, the diameter d and the chiral angle $\theta$, are related to (n,m) by $d =
0.078\sqrt{n^{2}+nm+m^{2}}$,. For example, a(10,10) nanotube is 1.35 nm in diameter whereas a (10,10) tube is 0.78nm in diameter. Carbon nanotubes exhibit extraordinary mechanical properties as will. For example, the Young's modulus is typically over 1 Tera Pascal. Also, the nanotube along the axis is as stiff as a diamond. The estimated tensile strength is about 200 Gpa, which is an order of magnitude higher than that of any other material. Here we are mainly interested in carbon nanotube's electronic behavior and applications. The metallic and semiconducting nature described previously has given rise to the possibilities of metal-semiconductor or semiconductor junctions. These junctions may form nanoelectronic devices based entirely on single atomic species such as carbon.

Fault tolerance: TeraMac
Teramac is a massively parallel experimental computer built at Hewlett-Packard Laboratories to investigate a wide range of different computational architectures. It is a true supercomputer, capable of operating 100 times faster than a high-end workstation for some configurations. Teramac also contains about 220,000 defects, any one of which could prove fatal to a more conventional machine. The architecture of Teramac, the philosophy behind its construction, and its ability to tolerate large numbers of defects have significant implications for any future nanometer-scale computational paradigm. It is not necessary to chemically synthesize perfect devices with a 100% yield and assemble them into a completely deterministic network in order to obtain a reliable and powerful system. Future computers may not have a central processing unit, but may instead be an extremely large configurable memory that is trained for specific tasks by a tutor. In this article, we will describe Teramac with particular emphasis on those aspects most relevant to scientists interested in developing computational nanotechnology. Several concepts related to the logical architecture of Teramac are graphically presented here. (A) The Cross Bar represents the heart of the configurable wiring network that makes up Teramac. The inset shows a configuration bit (a memory element) that controls a switch. The bit is located and configured using the address lines, and its status is read using the data lines. The cross bar provides not only a means of mapping many configuration bits together into some desired sequence, but it also represents a highly redundant wiring network. Between any two configuration bits, there are a large number of pathways, which implies a high communication bandwidth within a given cross bar. Logically, this may be represented as a 'fat tree.' Such a 'fat tree' is shown in (B), where it is contrasted with a standard tree architecture. Note that both trees appear the same from the front view, but from an oblique view, the fat tree has a bandwidth that the standard tree does not. Color coded dots and a dashed box are included to show the correspondence between a given level of the fat tree and the cross bar in (A). See figure.9.

Conclusion
Even a lot of approach has been proposed in moletronic computer. But there still exists critical problem: most of the technologies are valid only in laboratory condition, and cannot be produced massively.