25-03-2016, 05:25 AM
I am looking for vhdl code for interfacing ps2 keyboard and vga monitor to xilinx
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interfacing a ps 2 keyboard and vga monitor to xilinx xc3s200 fpga vhdl et ucf
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I am looking for vhdl code for interfacing ps2 keyboard and vga monitor to xilinx
31-03-2016, 01:55 PM
interfacing a ps 2 keyboard and vga monitor to xilinx xc3s200 fpga vhdl et ucf
• The Data and Clock lines are both open collector. A resistor is connected between each line and +5V, so the idle state of the bus is high.
• When the keyboard wants to send information, it first checks the Clock line to make sure it's at a high logic level. If it's not, the FPGA is inhibiting
communication and the device must buffer any to-be-sent data until the host releases Clock.
• The Clock line must be continuously high for at least 50 µs before the device can begin to transmit its data.
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