Inside USB
#1

Inside USB
B.Tech Seminar report
by
Appu Sajeev
Department of Computer Science And Engineering
Government Engineering College, Thrissur
December 2010

[attachment=8372]

Abstract
USB is an interfacing protocol to establish communication between various devices and
a host controller. It was developed in the year 1996 and has replaced several interfaces
like serial port, parallel port and has become an interfacing standard today. The paper
covers the internals of USB mainly the physical characteristics, USB protocol, USB
packet format, USB transfer types and nally about building a USB device.
Seminar Report 2010
Chapter 1
Introduction
Universal Serial Bus is a fast, standard, serial interfacing protocol with handshaking.
It began development in 1994 by a group of seven companies: Compaq, DEC, IBM,
Intel, Microsoft, NEC and Nortel and the rst speci cation was published in 1996.
USB was designed with personal computers in mind, but it has been adopted to other
devices such as smartphones , PDAs and video game consoles, and as a power cord.
USB has features like Auto detection and con guration, plug n play etc. Up to 127
di erent devices can be connected to one USB port and external hubs cans be used
to extend this number.
The 3 di erent version of USB are :-
 USB 1.1, known as Full-Speed USB has a maximum speed of 12 Mbps.
 USB 2.0, known as Hi-Speed USB has a maximum speed of 480 Mbps
 USB 2.0, known as SuperSpeed USB has a maximum speed of 4.8 Gbps
1.1 Organization Of the Report
1. Chapter 2 describes the basic concepts and topology of USB.
2. Chapter 3 describes the electrical characteristics of USB.
3. Chapter 4 is about Endpoints and Pipes, important terms in the USB world.
4. Chapter 5 describes the USB protocol and USB packet format.
5. Chapter 6 explains the di erent transfer types supported by USB for various
requirements.
6. Chapted 7 is about building a hobby USB device.
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Seminar Report 2010
Chapter 2
Basic Concepts and Topology

USB is basically a polled bus. The host controller, present in the host machine is
responsible for polling the devices at regular intervals, raising interrupts, exchanging
data with the device, enumerating the devices etc. The host controller used com-
monly is EHCI(Enhanced Host Controller Interface), a high speed controller standard
designed by Intel.EHCI only provides high-speed USB functions. It relies on a com-
panion controller, either OHCI(Open Host Controller Interface) or UHCI(Universal
Host Controller Interface), to handle full- and low-speed devices.
A physical USB device may consist of several logical sub-devices that are referred
to as device functions. A single device may provide several functions,(eg. a webcam
with a built-in microphone) . Such a device is called a compound device in which
each logical device is assigned a distinct address by the host and all logical devices
are connected to a built-in hub to which the physical USB wire is connected. A host
assigns only one device address to a function.
2.1 Topology
USB system has an asymmetric design with a host, multiple downstream ports to
which various devices are connected in a star topology. USB devices are linked in series
through hubs. There is always a root hub, which is built into the host controller of the
system. A maximum of 127 devices can be connected to a single port. Additional hubs
can be connected to the USB ports and can extend the number of devices interfaced
through a port. This branch into a tree structure but a maximum of ve levels from
the root hub is only possible. It is also possible for several computers to access a same
hub.
USB topology is visualised in the following gure
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section 2.1 Seminar Report 2010
Figure 2.1: USB topology

Chapter 3
Electrical Speci cations

USB has a relatively simple interface, with two wires for power (5V and GND) and
two lines of serial data (D+ and D-). The presence of a 5V supply enables the design
of bus powered devices which was not possible in the era of serial and parallel ports.
Each port can source a maximum current of 500 mA in USB 2.0 and 900 mA in USB
3.0. The power supply provided by the USB has a tolerance of 0.25V and thus the
actual voltage available is between 5.25V and 4.75V.
Figure 3.1: USB connections
The data lines D+ and D- form a di erential pair ie. The voltage one one line
is the inverse of the voltage on the other. The data lines are also NRZI encoded for
synchronisation with bit stung.
3.1 NRZI Encoding
NRZI(Non-Return to Zero, Inverted) is an encoding mechanism is which at the start
of each clock pulse, if the signal to be transmitted given is at logical 1 state, there
is no change in the level of the encoded signal. If the given signal to be transmitted
is at logical 0, there is a transition towards the opposite level in the encoded signal.
The following example demonstrates the same.
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section 3.2 Seminar Report 2010
Figure 3.2: NRZI Encoding
3.2 Di erential Signalling
In di erential signalling, two complementary signals are sent over two separate signal
lines. At the receiving side, the di erence is levels of the two lines are taken. The
signalling method o ers better noise immunity and resistance of electromagnetic in-
terference. Since di erence in signal levels is taken, induced noise voltages will be
cancelled out as the noise voltage induced will be approximately same in both lines.
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section 3.3 Seminar Report 2010
Figure 3.3: Di erential Signalling
3.3 Bit Stung
Bit stung is the process of adding non-information bits into data stream. It has
several purposes like to prevent data from being interpreted as control information,
to ll bu ers or frames etc.The location of the stung bits is communicated to the
receiving end of the data link, where these extra bits are removed to return the bit
streams to their original bit rates or form.Also for protocols that required a continuous
stream of data, zero bits are sometimes inserted to ensure that the stream is not
broken.

Chapter 4
Endpoints and Pipes

USB device communication is based on the concept of endpoints and pipes.
4.1 Endpoints
Endpoint refers to a uniquely addressable portion of the device that can act as either
source or sink of data. Endpoints are physically present in the device. Every device has
at least one endpoint, Endpoint 0. Each endpoint has an associated address which is a
combination of endpoint number and direction. Each USB data transaction contains
device address as well as endpoint address. A device can have a maximum of 32
endpoints.
4.2 Pipes
Pipes are logical channels through which data
ows between the host and a device
endpoint. It is similar to the concept of sockets. A pipe is formed only when the
host establishes a connection to a device endpoint and the pipe formed is the logical
channel through which the host communicates with the endpoint.
There are two types of pipes
1. Stream pipes: They have no de ned USB format, we can send any type of data
through a stream pipe and the data can be retrieved at the other end. Data

ows sequentially and has a pre-de ned direction, either in or out Stream pipes
can be either controlled by the host or device.
2. Message pipes: Message Pipes have a de ned USB format. They are host con-
trolled, which are initiated upon a request sent from the host. Data is then
transferred in the desired direction, according to the request. Message pipes
allow bidirectional transfers but will only supports control transfers.
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section 4.2 Seminar Report 2010
The following gure illustrates the concept of Endpoints and Pipes
Figure 4.1: Endpoints and Pipes

Chapter 5
USB Protocol and Packet format

USB is made up of several layers of protocols like TCP/IP. The lower layer activities
are handled by the the USB controller ICs present in the device while higher layer
functionalities are usually implemented in rmware. USB is a host centric bus. The
host initiates all transfers. A device engages itself in a transaction only when the
host requests it. A data transfer operation can transfer data from the host to the
device or vice versa. We can further subdivide a data transfer into transactions. Each
transaction consists of
 Token packet (Header de ning what follows next)
 An optional Data Packet (Containing the data payload)
 Status Packet (Used to acknowledge a transaction)
Trac on the USB is regulated using time. The unit of time is the frame. The
length of each frame is governed by the bus clock, which runs at a rate of 1KHz, so
there are 1,000 frames per second: one per millisecond. Hence, every 1 ms, packets
are grouped into frames and are released onto the bus.
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section 5.1 Seminar Report 2010
5.1 USB Packet format
In USB, data is sent in the form of packets, similar to the packets in networking.
5.1.1 Fields common to all packets
The following elds are common to all packets.
SYNC eld
All packets must start with a sync eld. It is used by the input circuitry to align
incoming data with the local clock. The sync eld is 8 bits long at low and full
speed or 32 bits long for high speed and is used to synchronise the clock of the
receiver with that of the transmitter. The last two bits in the SYNC eld are a
marker that is used to identify the end of the SYNC eld and the start of the
PID.
PID eld (Packet Identi er)
This eld is used to identify the type of packet that is being sent. It immediately
follows the SYNC eld of every USB packet. A PID consists of a four bit eld
followed by a four-bit check eld as shown in the gure. The PID indicates the
type of packet, the format of the packet and the type of error detection applied
to the packet. The four-bit check eld of the PID ensures reliable decoding of
the PID. The PID check eld is generated by performing a ones complement
of the 4 bit PID eld. A PID error exists if the four PID check bits are not
complements of their respective packet identi er bits. The format of a PID eld
is
Figure 5.1: PID eld format
The table on the next page shows the possible values with various meanings.
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section 5.1 Seminar Report 2010
Figure 5.2: PID bit meanings
ADDR eld (Address eld)
The address eld speci es the address of the device with which the host soughts
transfer .Its 7 bits long and thus 128 di erent addresses/devices must be possible.
However, Address 0 is not valid, as any device which is not yet assigned an
address must respond to packets sent to address zero. Hence, a total of 127
devices can be addressed.
The address eld speci es the address of the device with which the host soughts
transfer .Its 7 bits long and thus 128 di erent addresses/devices must be possible.
However, Address 0 is not valid, as any device which is not yet assigned an
address must respond to packets sent to address zero. Hence, a total of 127
devices can be addressed. The format of ADDR eld is
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section 5.2 Seminar Report 2010
Figure 5.3: ADDR eld bits
ENDP eld (Endpoint eld)
The endpoint eld, denoting the endpoint on the device is made up of 5 bits,
allowing 32 possible endpoints.
CRC eld (Cyclic Redundancy Check)
Cyclic Redundancy Checks are performed on the data within the packet payload.
All token packets have a 5 bit CRC while data packets have a 16 bit CRC.
EOP eld (End Of Packet eld)
End of packet eld. Signalled by a Single Ended Zero (SE0) for approximately
2 bit times.
5.2 USB Packet types
There are three di erent types of packets in the USB protocol. They are Token packet,
Data packet and Handshake packets.
5.2.1 Token packet
Token packets indicate the type of transaction to follow. Depending on the value of
the PID eld, token packets are of 3 types
 In - Informs the USB device that the host wishes to read information.
 Out - Informs the USB device that the host wishes to send information.
 Setup - Used to begin control transfers.
The format of a token packet is
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section 5.2 Seminar Report 2010
Figure 5.4: Token packet structure
 ADDR eld contains the 7 bit address of the device with which the host wishes
to perform a transaction.
 ENDP is the endpoint address, denotes the endpoint number. 4 bits in size
 CRC5 is the 5 bit CRC
 EOP is the End Of Packet eld.
5.2.2 Data packet
Contains the data payload. It has the following format
Maximum payload size is 8 bytes for low speed and 1024 bytes for high speed
device.Data must be sent in multiples of bytes. There are two types of data packets
based on PID eld values- DATA0 and DATA1. The packet type used depends on the
data toggle bits present in host and device, one per each endpoint.The rst transaction
uses DATA0 PID.Upon receiving ACK, data toggle bits are inverted and DATA1 PID
is selected next. Next, DATA0 PID is selected and so on.This methos helps in error
correction. This makes sure the device receives the data packet it is expecting.
Figure 5.5: Data packet structure
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section 5.2 Seminar Report 2010
5.2.3 Handshake packet
These packets are used to return the status of a transaction.These packets contain
PID values indicating success or failure. It as the following format
Figure 5.6: Handshake packet structure
Depending on the value of PID eld, the three types of handshake packets are
 ACK - Acknowledgment that the packet has been successfully received.
 NAK - Reports that the device temporary cannot send or received data. Also
used during interrupt transactions to inform the host there is no data to send.
 STALL - The device nds is in a state that it requires intervention from the
host.
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Seminar Report 2010
Chapter 6
USB transfer types
USB supports four types of data transfer to cater to various needs of di erent devices.
The di erent transfer types provided by USB are
6.1 Control Transfer
Control transfers are typically used for command and status operations. They are
essential to set up a USB device with all enumeration functions being performed
using control transfers. They are typically bursty, random packets which are initiated
by the host and uses best e ort delivery. They can be used to transfer small chunks
of data also. Control transfers are always initiated by the host Endpoint 0 of every
device supports control transfer. About10% of USB bandwidth reserved for control
transfers. Control transfers can detect errors. Handshake packets must be sent by
the device to terminate transaction. Absence of handshake packets points to error.
A control transfer can have up to three stages- Setup stage, data stage and status
stage.In the setup stage, token packet with setup PID is sent, followed by a 8 byte
DATA0 packet with a speci c structure speci ed by the USB protocol. Followed by
the setup stage is the optional data stage which could contains one or more IN or
OUT transaction.The last stage is the status stage in which handshake packets return
the status of the transaction.
Example of a device side code is given on the next page.
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section 6.2 Seminar Report 2010
Figure 6.1: Control Transfer device side code
6.2 Interrupt Transfer
Interrupt transfers are typically non-periodic, small device initiated communication
requiring bounded latency. There is a guaranteed maximum time between transac-
tions. An Interrupt request is queued by the device until the host polls the USB
device asking for data. It uses unidirectional stream pipe for data transfer. Interrupt
transfer is used by devices like usb mouse. Interrupt transfers ensre that host will
request or send data with minmum delay. An interrupt transfer ends in two ways:
when the requested amount of data has been transferred, or when the data packet
size is less than the maximum.
Figure 6.2: Interrupt Transfer device side code
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section 6.4 Seminar Report 2010
6.3 Bulk Transfer
Bulk transfer is used to transfer non-time critical, large blocks of data. Devices like
USB Mass Storage utilize this type of data transfer. Bulk transfers provide error
correction in the form of a CRC16 eld on the data payload and error detection/re-
transmission mechanisms ensuring data is transmitted and received without error.
Bulk transfers will use spare un-allocated bandwidth on the bus after all other trans-
actions have been allocated. If the bus is busy with isochronous and/or interrupt
then bulk data may slowly trickle over the bus. As a result Bulk transfers should
only be used for time insensitive communication as there is no guarantee of latency.
A bulk transfer is considered complete when it has transferred the exact amount of
data requested.
6.4 Isochronous Transfer
Isochronous transfers are used to transfer time sensitive information, such as an audio
or video stream. Isochronous transfers occur continuously and periodically. It is used
in cases when data must arrive at constant rate. Since data is sent at constant rate,
completion time is predictable. It has error detection via CRC, there is no provision
for retransmitting the data received with errors, because that would slow down the
transfer. Hence, occasional errors must be acceptable. Isochronous and interrupt
transfers combined can use upto 90% of USB bandwidth. For this transfer, both host
and device must be able to to get data in and out of the USB bu ers at required rate
or else date will be overwritten or the receiver will refuse the data.
Dept. of CSE, GEC, Thrissur 17
Seminar Report 2010
Chapter 7
Building a USB device
Building a USB device is not as easy as building a device interfaced via serial port
or parallel port. The device must understand the USB protocol and must be able to
communicate with the host accordingly. To build a USB device, we need to build the
hardware part as well as the software part to control the device.
7.1 Hardware
For hobby developers, USB devices can be built using microcontrollers like Atmel AT-
Mega8,ATTiny2313 etc. A library called v-usb has been developed that implements
usb protocol in the rmware of these microcontrollers. We can use that library to
perform control, interrupt, bulk transfer. The following is a simple shows how the
microcontroller can be interfaced to the USB.
Figure 7.1: USB Device circuit
As regards professional and consumer products, specialised solutions like FTDI
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section 7.2 Seminar Report 2010
chips exist that talks USB protocol more eciently. They are available o the shelf
and o ers better features and performance
7.2 Software
We also need to develop code to control the device. A high level open source library
call LibUSB exists using which we can communicate with USB devices. The library,
written in C provides functions to perform control, interrupt, bulk, isochronous trans-
fers.

Chapter 8
Conclusion

USB is a widely adopted interfacing standard which is
exible enough to support a
variety of interfacing requirements. A basic idea about the internals of USB was given
including details like the electrical characteristics, Endpoints and Pipes, USB protocol
and packet format, various transfer types supported and nally about building a USB
device.

References
[1] USB Implementers Forum, http://usb
[2] USB in a nutshell, http://beyondlogicusbnutshell/
[3] USB protocol speci cation, http://faculty.iubremen.de/birk/lectures/PC1012003/
[4] USB Complete, by Jan Axelson


Reply
#2
Inside USB:
The Basics

Appu Sajeev
2K7708
S7 CSE

[attachment=8377]

Overview
Basic Concepts
Topology
Physical Specifications
Endpoints and Pipes
USB packet format
Transfer types
USB Enumeration
Building a USB Device

Universal Serial Bus
Fast, standard, serial interfacing protocol with handshaking
Auto detection and configuration
Upto 127 devices can be connected to one port, hubs can extend the number
Different versions:
USB 1.1 – form 1.5 Mbps(Low speed) up to 12Mbps (Full Speed)
USB 2.0 – up to 480 Mbps(Hi Speed)
USB 3.0 – up to 5 Gbps (Super Speed)

Topology
A hub is at the center of each star. Each wire segment is a point-to-point connection

Physical Specifications
Simple Interface, 2 wires for power (5V and GND) and 2 wires for serial data (D+ and D-). Can source a maximum of 500mA






D+ and D- form a differential pair, the voltage in on line is the is the inverse of other.


The data lines are NRZI (Non Return to Zero Inverted) encoded for synchronization. No explicit clock signal

USB packet format
Each USB transaction is divided into one or more transactions.

Each transaction involves 3 packets – Token packet, Data packet(optional) and handshake packet

Packets are grouped into frames that are released every 1 ms

Fields common to each packet
SYNC field – Used to synchronize the clocks of host and device. Denotes the start of a packet

8 bits for USB 1.1 devices and 32 bits for USB 2.0 devices

Reply
#3
plz post complete documentation of this seminars
Reply
#4

Hi,
the seminar report and the ppt are posted in the above posts. Please download the attached files.
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