Implementation of parallel Reed-Solomon Turbo Decoder
#1

[attachment=9221]
Implementation of parallel Reed-Solomon Turbo Decoder
Objective
 Implementing RTL code for RS turbo decoder.
 To achieve high efficiency.
 To achieve high Throughput
Overview
 Implementing RS turbo decoder using VHDL code.
 Introduce errors.
 Detecting the errors.
 Correct the errors.
RS Decoder
 Syndrome computation (S C ).
 KEY (Key- equation- solver).
 CSEE (Chien search Error evaluator ).
Architecture
Pseudo code for RS decoder

 1 : Introduce errors fSimulate noiseg
 2 : Compute Syndromes
 3 : if S(x) = 0 then
 4 : Declare no error
 5 : else (Error in code word)
 6 : {Key Equation Solver}
 7 : for all j such that do
 8 : if = 0 then {Chien Search}
 9 : Compute Yi {Forney Evaluator}
 10 : Add Yi to the received symbol.
 11 : end if
 12 : end for
 13 : end if
 14 : Compare the output with the original code word
K E S
 Generates the key equation
 Error locator
 Error evaluator
The two polynomial defined as
 The syndromes are used to compute the error locator and error evaluator polynomial.
 If there are e errors in the received code word, we can define the error locator polynomial of degree e and the error evaluator polynomial of degree at most e − 1 to be
Chien Algorithm
 Chien search involved checking whether for each j,
 If it is, then an error has occurred at j th location in the received code word.
Error Evaluator
 The next step is to compute the value of error, Yi that has occurred.
 This is computed by Forney’s error value formula :
Reply

Important Note..!

If you are not satisfied with above reply ,..Please

ASK HERE

So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Popular Searches: who is jillian rose reed, who is reed dollaz, aramesh iitm reed valve work, concurrent error detection in reed solomon encoder and decoder, 2 stroke engine reed vavle, video compression david solomon ppt, reed solomon parallel,

[-]
Quick Reply
Message
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Possibly Related Threads...
Thread Author Replies Views Last Post
  Implementation of RSA Algorithm Using Client-Server full report seminar topics 6 26,853 10-05-2016, 12:21 PM
Last Post: dhanabhagya
  Implementation of Diffie-Hellman Key Exchange on Wireless Sensor Using Elliptic Curv project report helper 2 3,162 31-10-2015, 02:16 PM
Last Post: seminar report asees
  Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture summer project pal 3 2,927 01-12-2012, 12:40 PM
Last Post: seminar details
  Integrated Design and Implementation of Embedded Control Systems with Scilab seminar surveyer 1 2,358 19-10-2012, 01:58 PM
Last Post: seminar details
  An Implementation of the FP-growth Algorithm computer girl 0 1,042 07-06-2012, 02:13 PM
Last Post: computer girl
  Parallel Computing In Remote Sensing Data Processing computer science crazy 4 4,849 01-03-2012, 09:32 AM
Last Post: seminar paper
  MASSIVELY PARALLEL COMPUTING seminar projects crazy 1 1,607 24-02-2012, 11:40 AM
Last Post: seminar paper
  PARALLEL COMPUTING IN REMOTE SENSING DATA PROCESSING seminar projects crazy 1 2,934 24-02-2012, 11:40 AM
Last Post: seminar paper
  Parallel Computing In India computer science crazy 5 6,156 24-02-2012, 11:40 AM
Last Post: seminar paper
  Design Of 2-D Filters Using A Parallel Processor Architecture (Download Full Seminar Computer Science Clay 3 3,025 18-02-2012, 10:37 AM
Last Post: seminar paper

Forum Jump: