FLASH MEMORY
#1


[attachment=7646]


Presented By:
Krishna Kumar Barik


Introduction
Flash memory is a non-volatile computer storage that can be electrically erased and reprogrammed. It is a technology that is primarily used in Memory cards and USB flash drives for general storage and transfer of data between computers and other digital products.

History

Flash memory (both NOR and NAND types) was invented by Dr. Fujio Masuoka while working for Toshiba circa 1980. According to Toshiba, the name "flash" was suggested by Dr. Masuoka's colleague, Mr. Shoji Ariizumi, because the erasure process of the memory contents reminded him of the flash of a camera. Dr. Masuoka presented the invention at the IEEE 1984 International Electron Devices Meeting (IEDM) held in San Francisco, California.

Evolution Level of Flash Memory
Why Flash Memory Popular
Flash Rom storage devices are shock proof, dust proof, immune to magnetic fields and really small too.
Other Main Reason
Power consumption ,Portability ,Capacity
Durability ,Performance ,Reliability
Plug-and –play.

Principle of operation
Flash memory stores information in an array of memory cells made from floating-gate transistors. In traditional single-level cell (SLC) devices, each cell stores only one bit of information. Some newer flash memory, known as multi-level cell (MLC) devices, can store more than one bit per cell by choosing between multiple levels of electrical charge to apply to the floating gates of its cells.
Floating-gate transistor
Flash memory circuit diagram
Basic Algorithm calling sequence
Flash memory type
Flash memory Architecture Decision:
Flash memory should be Removable or
Non-Removable .It is based on the requirement.

Flash memory is two type:
1. NOR gate Flash
2. NAND gate Flash

NOR gate Flash
In NOR gate flash, each cell has one end connected directly to ground, and the other end connected directly to a bit line.
This arrangement is called "NOR flash" because it acts like a NOR gate: when one of the word lines is brought high, the corresponding storage transistor acts to pull the output bit line low.

NOR Flash memory Architecture
NAND gate Flash
NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (transistors' VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array.

NAND Flash Array
Distinction Between NOR and NAND Flash
Distinction Between NOR and NAND Flash:
The connections of the individual memory cells are different. 
The interface provided for reading and writing the memory is different (NOR allows random-access for reading, NAND allows only page access).


Limitation
Flash Memory has some draw back:
Block Erasure
Memory wear

Conclusion
Flash memory is advanced computer storage.
Flash memory is non-volatile, no power is needed to maintain the information stored in the chip.
Flash memory offers fast read access times and better kinetic shock resistance than hard disks.
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#2
PRESENTED BY:
Rob Douglas
Alex Alexandrov

[attachment=9149]
Flash Memory
 A type of EEPROM (Electrically-Erasable Programmable Read-Only Memory)
 Non-volatile, solid state technology
 Relatively limited lifespan
 Information is stored in an array of memory cells made from floating-gate (FG) transistors
 Packaged inside a memory card:
 Extremely durable
 Can withstand intense pressure
 Immersion in water
 Better kinetic shock resistance than hard disks
 Average power requirements range from 5V-12V
Flash Memory Cell
History of Flash Memory

 Invented by Fujio Masuoka while he was working for Toshiba in the early 1980s
 First introduced at the 1984 International Electron Devices Meeting in San Francisco
Manufacturers of Flash
NOR Flash Memory
 Developed to replace read only memory
 Full address and data buses allow random access to any memory location
 Can access any memory cell
 Slow sequential access
NAND Flash Memory
 Developed to replace hard disks
 Sequential-accessed command and data registers replace the external bus of NOR
 Decreases chip real estate
 Can only access pages
 Faster sequential access
Optimizations
 Wear levelling
 Counting writes & dynamically remapping blocks
 Bad block management
 Write verification and remapping bad sectors
 Multi-Level Cell technology
 Memory cells store more than one bit
Standardization
 Part of the reason for the success of Flash memory
 Open NAND Flash Interface Working Group developed standard low-level interface
 Standard pinout
 Standard command set for reading, writing, and erasing NAND flash chips
 Mechanism for self-identification
New Developments
 AND Flash
 Bit line replaced with embedded diffusion line to reduce cell size
 Low power dissipation (3V)
 DINOR (DIvided bit-line NOR) Flash
 Attempts to reduce the chip real estate compared to conventional NOR
 Low power dissipation (3V), sector erase, high data transfer rate
Future of Flash Memory
 Continues to be among the most aggressively scaled electronic technologies
 Memory cell size minimum of 20 nm expected to be met in 2010
 May be replaced by Phase-Change RAM or other emerging technologies
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#3


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