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Large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. VLSI began in the 1970s when the semiconductor complex and communication technologies were being developed. The microprocessor is a VLSI device. Prior to the introduction of VLSI technology most ICs had a limited set of functions that they could perform. An electronic circuit may consist of a CPU, ROM, RAM and other glue logic. VLSI allows IC designers to add all this on a single chip.
The structured design of VLSI is a modular methodology originated by Carver Mead and Lynn Conway to save area of microchips by minimizing the area of interconnecting fabrics. This is achieved by the repetitive arrangement of rectangular macroblocks which can be interconnected using a wiring by means of a stop. An example is to partition the design of an adder into a row of equal bit cells. In complex designs, this structuring can be achieved by hierarchical nesting.
Structured VLSI design had been popular in the early 1980s but lost its popularity later because of the arrival of routing and routing tools losing a lot of routing area, which is tolerated due to the progress of Moore's law. Reiner Hartenstein coined the term "structured VLSI design" (originally as "LSI structured design"), echoing Edsger Dijkstra's structured programming approach by nesting procedures to avoid a chaotic spaghetti-structured program.
Large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. VLSI began in the 1970s when the semiconductor complex and communication technologies were being developed. The microprocessor is a VLSI device.
Prior to the introduction of VLSI technology, most ICs had a limited set of functions that they could perform. An electronic circuit may consist of a CPU, ROM, RAM and other glue logic. VLSI allows IC designers to add all this on a single chip.
VLSI Design Flow
The design flow of the VLSI IC circuits is shown in the following figure. The different levels of design are numbered and the blocks show processes in the design flow.
The specifications come first, abstractly describe the functionality, interface and architecture of the digital IC circuit to be designed.
VLSI Design Flow
The behavior description is created to analyze the design in terms of functionality, performance, compliance with given standards and other specifications.
The description of RTL is made using HDLs. This RTL description is simulated to test functionality. From here we need the help of EDA tools.
The RTL description then becomes a gate-level netlist using logical synthesis tools. A gatelevel netlist is a description of the circuit in terms of gates and connections between them, which are made in such a way that they meet the specifications of time, power and area.
Finally, a physical layout is made, which will be verified and then sent to the manufacturing.