Abstract
This paper presents the development of asimple 1.5kW single-phase sinusoidal Pulse WidthModulation (PWM) inverter. This inverter isdesigned to be either a stand-alone or grid connectedinverter from a direct supply of photovoltaic (PV)cells. The developed inverter unit converts the DCinput supply from the PV cells into a clean sinusoidalvoltage output. This power inverter is also capable tobe a grid<onnected PV system where the electricityproduced by PV, which exceeded the loadconsumption can be feed back to the grid. Theinverter is of a full-bridge topology using a step-uptransformer. The PWM signals, which feid thebridges, are generated by a dual ended PWMmodulator, and isolated with the isolated gate driver.The L-C filter is implement after the step-uptransformer before . the load to attenuate theharmonics component. The 1.5kW designedprototype of the inverter was tested with the resistiveloads and a fluorescent lamp and the total harmonicdistortion (THD) for all load is about 2.7%.
1. THE SYSTEM OVERVIEW
The inverter developed in this research isintended for a stand alone operation. Although it isdesigned for stand alone operation, this inverter mayalso be arranged so that it could be operated as aninverter paralleled to power lines, unity power factorrectifier or Static VAR Generator (SVG) [I-31. Themodel built is an open loop version.The block diagram of the whole system is shownin Fig 1.Fig. 1. Inverter systemThe system consists of clock generator, ringcounter with weighted outputs, comparator, delayer,gate drivers, full bridge circuit, step up transformer,and filter circuit (4-61.0-7803-7565-3/02/$17.00 02002 IEEE. 297Clock generator is needed by sinewave generator.The clock frequency should be stable to providestable sinusoidal wave. While the sinewave generatoris built by means of two binary counter configured asring counter. The outputs are then converted to quasianalogsignal by means of weighted resistor ladder.The trianglewave generator is provided bymeans 7-bit binary counter fed by clock generator.The digital outputs are converted to quasi-analogsignal by using R-2R ladder networkThe comparators act as PWM modulator. Thereference wave is then converted to pulses.Comparators outputs are then fed to delay line toprovide turn-on delay time.Their outputs are then fed to the gate driverwhich contains four independent electrically-isolatedMOSFET drivers. The outputs of the gate driver arethen distributed to the power transistors in full-bridgearrangement. The output of the inverter has squarewaveform due to the switching pattern.In order to get proper output voltage level, theinverter output is then fed into the step-uptransformer. Also to reduce harmonics content, theoutput voltage is then fed to the LC filter.
2. POWER CIRCUIT
The power circuit topology chosen is full bridgetopology (Fig. 2.) with the considerations that it mustbe capable of delivering high-current at low voltage.This property is important if the converter isdesigned for photovoltaic applications. Full bridgetopology fits these requirements. The converter mustnot experience unbalanced operation conditionscaused by transformer unbalance or neutral pointvoltage unbalance.


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