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Development of model for a voltage/memory storage device utilising a floating gate MO
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#1
16-11-2011, 11:22 AM

hi today i have got an email from Leela Ram Praneeth , with following details , can any one hep with proceeding details...

project details:

Development of model for a voltage/memory storage device utilising a floating gate MOS device.

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Development of model for a voltage/memory storage device utilising a floating gate MOS device. Application area is in the hardware implantation of ANNs. (in QUCS software if possible)


Hope to have a gud reply with all the information soon.
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