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1. INTRODUCTION
An arithmetic-logic unit (ALU) is the part of a computer processor (CPU) that carries out arithmetic and logic operations on the operands in computer instruction words. In some processors, the ALU is divided into two units, an arithmetic unit (AU) and a logic unit (LU). Some processors contain more than one AU - for example, one for fixed-point operations and another for floating-point operations.
Generally arithmetic and logic unit (ALU) performs arithmetic operations like addition, subtraction, multiplication and division. This also performs logical operations like AND, OR, shift left and shift right etc.
A floating-point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division .
1.1 INTEGER ARITHMETIC
Integer arithmetic supports operations on integers ie. It accepts integers as inputs and also gives integer as output. Generally the operations that are to be performed under integer arithmetic are addition, subtraction, multiplication, division, logical operations and shifting.
Adders are usually implemented by combining multiple copies of simple components. The natural components for addition are half adders and full adders . The half adder takes two bits a and b as input and produces a sum bit s and a carry bit c as output. The half adder is also called a (2,2) adder, since it takes two inputs and produces two outputs. the full adder is a (3,2) adder and the logic equations are
A 0011
+B +0001

Sum 0100
it’s just like we do for decimal
0 + 0 = 0
1 + 0 = 1
1 + 1 = 2 which is 10 in binary, sum is 0 and carry is 1.
1 + 1 + 1 = 3 sum is 1, and carry is 1.
ADDITION:
Unsigned:
just like the simple addition
100001 00001010 (10)
+011101 +00001110 (14)
………………………………………..
111110 00011000 (24)
Ignore (throw away) carry out of the msb.
Why? Because computers always work with a fixed precision.
Sign magnitude:
Rules:
- add magnitudes only (do not carry into the sign bit)
- throw away any carry out of the msb of the magnitude
(Due to the fixed precision constraints.)
- add only integers of like sign ( + to + or - to -)
- Sign of result is same as sign of the addends
Examples:
0 0101 (5) 1 1010 (-10)
+ 0 0011 (3) + 1 0011 (-3)
………………………………………….
0 1000 (8) 1 1101 (-13)

0 01011 (11)
+ 1 01110 (-14)
----------------
Don’t add, must do subtraction!
One's complement:
by example
00111 (7) 111110 (-1) 11110 (-1)
+ 00101 (5) + 000010 (2) + 11100 (-3)
----------- ------------ ------------
01100 (12) 1 000000 (0) wrong! 1 11010 (-5) wrong!
+ 1 + 1
---------- ----------
000001 (1) right! 11011 (-4) right!
So it seems that if there is a carry out (of 1) from the msb, then the result will be off by 1, so add 1 again to get the correct result.(end around carry).
Two's complement:
Rules:
- Just add all the bits
- throw away any carry out of the msb
- (same as for unsigned!)
Examples:
00011 (3) 101000 111111 (-1)
+ 11100 (-4) + 010000 + 001000 (8)
------------ ----------- --------------
11111 (-1) 111000 1 000111 (7)
After seeing examples for all these representations, you may see why 2's complement addition requires simpler hardware than sign mag. or one's complement addition.
Subtraction is same as addition, it simply known as 2’s complement addition.
MULTIPLICATION:
0 x 0 = 0
0 x 1 = 0
1x 0 = 0
1x 1 = 0
.. Longhand, it’s just like decimal
……In 2’s complement we get the right answer with out any problem, sign extended both the multiplicand and multiplier as many bits.
DIVISION:
Use the same algorithm as for decimal integers. For integers it works good for unsigned integers only. As output we get quotient and remainder.
While doing division we must remember the algebra formulae
Dividend=(divisor * quotient) + remainder.
1.2 FLOATING POINT ARITHMETIC :
A simple representation of a floating point number (N) uses a fraction (F), base (B), and exponent(E), where N=F * BE . The base can be 2, 10, 16 or any other number . the fraction and exponent can be represented in many formats. For example they can be represented by 2’s complement format, sign magnitude form or ant other representation.
In binary floating point format negative exponents and fractions are represented using the 2’s complement form. We will use 4 bits for the fraction and 4 bits for the exponent. The fractional part will have a leading sign bit and three actual fraction bits and the implied binary point is after the first bit. The sign bit is zero(0) for positive numbers and one(1) for negative numbers.
As an example let us represent decimal 2.5 in this 8 bit 2’s complement floating point format,
2.5 = 0010.1000
=1.010 * 21 (standardized normal representation)
=0.101 * 22 ( 4 bit 2’s complement fraction)

Therefore
F = 0.101 E = 0010 N = 5 / 8 * 22
If the number was -2.5 , the same exponent can be used but the fraction must have negative sign . so the 2’s complement representation for the fraction is 1.011. therefore
F = 1.011 E = 0010 N = - 5 / 8 * 22

Other examples of floating point numbers using a 4 bit fraction and a 4 bit exponent are
F = 0.101 E = 0101 N = 5 / 8 * 25
F = 1.011 E = 1011 N = - 5/8 * 2(-5)
F = 1.000 E = 1000 N = -1 * 2(-8)
In order to utilize all the bits in F and have the maximum number of significant figures , F should be normalized so that its magnitude is as large as possible.
Unnormalized: F = 0.0101 E = 0011 N = 5 / 16 * 23 = 5 / 2
Normalized : F = 0.101 E = 0010 N = 5 / 8 * 22 = 5 / 2.
In this representation ,the exponent can be any number between -8 and +7 .the fraction can be any number between -1 and +0.875. zero(0) cannot be normalized , so F= 0.000 when N = 0 . Any exponent could then be used ; however , it is best to have a uniform representation of zero(0).
1.3 SIMULATION AND SYNTHESIS:
Synthesis:
Logic synthesis is the process of converting a high-level description of the design into an optimized gate-level presentation, given a standard cell library and certain design constraints.